commonlib: Refactor CSE sync eventLog
[coreboot2.git] / src / security / intel / txt / txt.h
blob63e5bcda5b802d02979bf30e7e337b98528ec02a
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #ifndef SECURITY_INTEL_TXT_H_
4 #define SECURITY_INTEL_TXT_H_
6 #include <types.h>
8 /* Error codes */
9 #define ACM_E_TYPE_NOT_MATCH 0x01
10 #define ACM_E_MODULE_SUB_TYPE_WRONG 0x02
11 #define ACM_E_MODULE_VENDOR_NOT_INTEL 0x03
12 #define ACM_E_SIZE_INCORRECT 0x04
13 #define ACM_E_CANT_CALL_GETSEC 0x05
14 #define ACM_E_NOT_FIT_INTO_CPU_ACM_MEM 0x06
15 #define ACM_E_NO_INFO_TABLE 0x07
16 #define ACM_E_NOT_BIOS_ACM 0x08
17 #define ACM_E_UUID_NOT_MATCH 0x09
18 #define ACM_E_PLATFORM_IS_NOT_PROD 0x10
20 void intel_txt_romstage_init(void);
21 void __noreturn txt_reset_platform(void);
22 void intel_txt_log_bios_acm_error(void);
23 int intel_txt_log_acm_error(const uint32_t acm_error);
24 void intel_txt_log_spad(void);
25 bool intel_txt_memory_has_secrets(void);
26 bool intel_txt_chipset_is_production_fused(void);
27 void intel_txt_run_sclean(void);
28 int intel_txt_run_bios_acm(const u8 input_params);
29 bool intel_txt_prepare_txt_env(void);
30 /* Allow platform override to skip TXT lockdown, e.g. required for RAS error injection. */
31 bool skip_intel_txt_lockdown(void);
32 const char *intel_txt_processor_error_type(uint8_t type);
33 void disable_intel_txt(void);
35 #endif /* SECURITY_INTEL_TXT_H_ */