src/soc/amd/common/acpi/aoac.asl

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #define AOAC_DEVICE(DEV_ID, SX) \
   4         PowerResource(AOAC, SX, 0) { \
   5                 OperationRegion (AOAC, SystemMemory, ACPIMMIO_BASE(AOAC) + 0x40 + (DEV_ID << 1), 2) \
   6                 Field (AOAC, ByteAcc, NoLock, Preserve) { \
   7                         /* \
   8                          * Target Device State \
   9                          * \
  10                          * 0 = D0 - Uninitialized \
  11                          * 1 = D0 - Initialized \
  12                          * 2 = D1/D2/D3Hot \
  13                          * 3 = D3Cold \
  14                          * \
  15                          * This field is only used to cut off register access. It does not \
  16                          * control any power states. D3Cold is the only value that will \
  17                          * cut off register access. All other values will allow register \
  18                          * access and are purely informational. \
  19                          */ \
  20                         TDS,    2, \
  21 \
  22                         DS,     1, /* Device State - Purely informational */ \
  23 \
  24                         /* \
  25                          * Power On Dev \
  26                          * \
  27                          * 1 = Perform hardware sequence to power on the device \
  28                          * 0 = Perform hardware sequence to power off the device \
  29                          * \
  30                          * This register is only valid when Is Software Control = 0. \
  31                          */ \
  32                         POD,    1, \
  33 \
  34                         /* Software Power On Reset B */ \
  35                         SPRB,   1, \
  36                         /* Software Ref Clock OK */ \
  37                         SRCO,   1, \
  38                         /* Software Reset B */ \
  39                         SRB,    1, \
  40                         /* \
  41                          * Is Software Control \
  42                          * \
  43                          * 1 = Allow software to control Power On Reset B, \
  44                          *     Ref Clock OK, and Reset B. \
  45                          * 0 = Hardware control \
  46                          */ \
  47                         ISWC,   1, \
  48 \
  49                         /* Power Reset B State */ \
  50                         PRBS,   1, \
  51                         /* Ref Clock OK State */ \
  52                         RCOS,   1, \
  53                         /* Reset B State */ \
  54                         RBS,    1, \
  55                         /* Device Off Gating State */ \
  56                         DOGS,   1, \
  57                         /* D3 Cold State */ \
  58                         D3CS,   1, \
  59                         /* Device Clock OK State */ \
  60                         COS,    1, \
  61                         /* State of device */ \
  62                         STA0,   1, \
  63                         /* State of device */ \
  64                         STA1,   1, \
  65                 } \
  66                 Method(_STA) { \
  67                         Local0 = (PRBS && RCOS && RBS) \
  68 \
  69                         If (Local0) { \
  70                                 Return (1) \
  71                         } Else { \
  72                                 Return (0) \
  73                         } \
  74                 } \
  75                 Method(_ON, 0, Serialized) { \
  76                         ISWC=0 \
  77                         POD=1 \
  78 \
  79                         While (!PRBS || !RCOS || !RBS) { \
  80                                 Stall (100) \
  81                         } \
  82                 } \
  83                 Method(_OFF, 0, Serialized) { \
  84                         ISWC=0 \
  85                         POD=0 \
  86 \
  87                         While (PRBS || RCOS || RBS) { \
  88                                 Stall (100) \
  89                         } \
  90                 } \
  91                 Method(_RST, 0, Serialized) { \
  92                         ISWC=1 \
  93                         SRB=1 \
  94 \
  95                         /* Assert the SwRstB signal for 200 us */ \
  96                         Stall (200) \
  97 \
  98                         SRB=0 \
  99                         ISWC=0 \
 100 \
 101                         While (!PRBS || !RCOS || !RBS) { \
 102                                 Printf ("Waiting for device to complete reset") \
 103                                 Stall (100) \
 104                         } \
 105                 } \
 106         } \
 107         Name (_PR0, Package () { AOAC }) \
 108         Name (_PR2, Package () { AOAC }) \
 109         Name (_PR3, Package () { AOAC }) \
 110         Method (_PS0, 0, Serialized) { \
 111                 ^AOAC.TDS = 1 \
 112         } \
 113         Method (_PS3, 0, Serialized) { \
 114                 ^AOAC.TDS = 3 \
 115         }