drivers/usb/acpi: Don't add GPIOs to _CRS for Intel Bluetooth
[coreboot2.git] / src / soc / amd / common / acpi / lpc.asl
blob254fc69793d1c9735e982fc073c0e4da57dccead
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #if MAINBOARD_HAS_SPEAKER
4 #define IO61_HID "PNP0800" /* AT style speaker */
5 #else
6 #define IO61_HID "PNP0C02" /* reserved resource */
7 #endif
9 /* 0:14.3 - LPC */
10 Device(LPCB) {
11         Name(_ADR, 0x00140003)
13         /* Method(_INI) {
14         *       DBGO("\\_SB\\PCI0\\LpcIsaBr\\_INI\n")
15         } */ /* End Method(_SB.SBRDG._INI) */
17         OperationRegion(CFG,PCI_Config,0x0,0x100) // Map PCI Configuration Space
18         Field(CFG,DWordAcc,NoLock,Preserve){
19                 Offset(0xA0),
20                 BAR,32}         // SPI Controller Base Address Register (Index 0xA0)
22         Device(LDRC)    // LPC device: Resource consumption
23         {
24                 Name (_HID, EISAID("PNP0C02"))  // ID for Motherboard resources
25                 Name (_UID, 0x3278)
26                 Name (CRS, ResourceTemplate ()  // Current Motherboard resources
27                 {
28                         Memory32Fixed(ReadWrite,        // Setup for fixed resource location for SPI base address
29                         0x00000000,                     // Address Base
30                         0x00001000,                     // Address Length
31                         BAR0                            // Descriptor Name
32                         )
34                         Memory32Fixed(ReadWrite,        // Setup for fixed resource location for eSPI base address
35                         0x00000000,                     // Address Base
36                         0x00001000,                     // Address Length
37                         BAR1                            // Descriptor Name
38                         )
39                 })
41                 Method(_CRS,0,Serialized)
42                 {
43                         CreateDwordField(^CRS,^BAR0._BAS,SPIB)  // Field to hold SPI base address
44                         CreateDwordField(^CRS,^BAR1._BAS,ESPB)  // Field to hold eSPI base address
45                         Local0 = BAR & 0xffffff00
46                         SPIB = Local0   // SPI base address mapped
47                         Local1 = Local0 + 0x10000
48                         ESPB = Local1   // eSPI base address mapped
49                         Return(CRS)
50                 }
51         }
53         /* Real Time Clock Device */
54         Device(RTC0) {
55                 Name(_HID, EISAID("PNP0B00"))   /* AT Real Time Clock (not PIIX4 compatible) */
56                 Name(_CRS, ResourceTemplate() {
57                         IRQNoFlags(){8}
58                         IO(Decode16,0x0070, 0x0070, 0, 2)
59                 })
60         } /* End Device(_SB.PCI0.LpcIsaBr.RTC0) */
62         Device(TMR) {   /* Timer */
63                 Name(_HID,EISAID("PNP0100"))    /* System Timer */
64                 Name(_CRS, ResourceTemplate() {
65                         IRQNoFlags(){0}
66                         IO(Decode16, 0x0040, 0x0040, 0, 4)
67                 })
68         } /* End Device(_SB.PCI0.LpcIsaBr.TMR) */
70         Device(SPKR) {  /* Speaker */
71                 Name(_HID,EISAID(IO61_HID))
72                 Name (_UID, 0x7239)
73                 Name(_CRS, ResourceTemplate() {
74                         IO(Decode16, 0x0061, 0x0061, 0, 1)
75                 })
76         } /* End Device(_SB.PCI0.LpcIsaBr.SPKR) */
78         Device(PIC) {
79                 Name(_HID,EISAID("PNP0000"))    /* AT Interrupt Controller */
80                 Name(_CRS, ResourceTemplate() {
81                         IRQNoFlags(){2}
82                         IO(Decode16,0x0020, 0x0020, 0, 2)
83                         IO(Decode16,0x00a0, 0x00a0, 0, 2)
84                 })
85         } /* End Device(_SB.PCI0.LpcIsaBr.PIC) */
87         Device(MAD) { /* 8257 DMA */
88                 Name(_HID,EISAID("PNP0200"))    /* Hardware Device ID */
89                 Name(_CRS, ResourceTemplate() {
90                         DMA(Compatibility,BusMaster,Transfer8){4}
91                         IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
92                         IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
93                         IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
94                         IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
95                         IO(Decode16, 0x008f, 0x008f, 0x01, 0x01)
96                         IO(Decode16, 0x00c0, 0x00c0, 0x10, 0x20)
97                 }) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
98         } /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
100         Device(COPR) {
101                 Name(_HID,EISAID("PNP0C04"))    /* Math Coprocessor */
102                 Name(_CRS, ResourceTemplate() {
103                         IO(Decode16, 0x00f0, 0x00f0, 0, 0x10)
104                         IRQNoFlags(){13}
105                 })
106         } /* End Device(_SB.PCI0.LpcIsaBr.COPR) */
107 } /* end LPCB */