src/soc/amd/common/block/acp/acp_gen2.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <amdblocks/acp.h>
   4 #include <amdblocks/chip.h>
   5 #include <device/device.h>
   6 #include <device/mmio.h>
   7 #include <console/console.h>
   8 #include "acp_def.h"
   9
  10 /* ACP registers and associated fields */
  11 #define ACP_PME_EN              0x41400
  12 #define  PME_EN_MASK            (1 << 0)
  13 #define ACP_I2S_PIN_CONFIG      0x41440 /* HDA, Soundwire, I2S */
  14 #define  PIN_CONFIG_MASK        (0xf << 0)
  15 #define ACP_I2S_WAKE_EN         0x4145C
  16 #define  WAKE_EN_MASK           (1 << 0)
  17
  18 static void acp_update32(uintptr_t bar, uint32_t reg, uint32_t clear, uint32_t set)
  19 {
  20         clrsetbits32p(bar + reg, clear, set);
  21 }
  22
  23 void acp_init(struct device *dev)
  24 {
  25         const struct soc_amd_common_config *cfg = soc_get_common_config();
  26         struct resource *res;
  27         uintptr_t bar;
  28
  29         res = dev->resource_list;
  30         if (!res || !res->base) {
  31                 printk(BIOS_ERR, "Error, unable to configure pin in %s\n", __func__);
  32                 return;
  33         }
  34
  35         /* Set the proper I2S_PIN_CONFIG state */
  36         bar = (uintptr_t)res->base;
  37         acp_update32(bar, ACP_I2S_PIN_CONFIG, PIN_CONFIG_MASK, cfg->acp_config.acp_pin_cfg);
  38
  39         /* Enable ACP_PME_EN and ACP_I2S_WAKE_EN for I2S_WAKE event */
  40         acp_update32(bar, ACP_I2S_WAKE_EN, WAKE_EN_MASK, !!cfg->acp_config.acp_i2s_wake_enable);
  41         acp_update32(bar, ACP_PME_EN, PME_EN_MASK, !!cfg->acp_config.acp_pme_enable);
  42 }