mb/google/nissa/var/rull: Configure Acoustic noise mitigation
[coreboot2.git] / src / soc / amd / common / block / acpi / Kconfig
blob90e66b2ca7d2dcd1d2f8ff0dc7f48e8528704077
1 ## SPDX-License-Identifier: GPL-2.0-only
3 config SOC_AMD_COMMON_BLOCK_ACPI
4         bool
5         depends on SOC_AMD_COMMON_BLOCK_ACPIMMIO
6         select ACPI_AMD_HARDWARE_SLEEP_VALUES
7         select ACPI_COMMON_MADT_IOAPIC
8         select ACPI_COMMON_MADT_LAPIC
9         select ACPI_CUSTOM_MADT
10         help
11           Select this option to use the AcpiMmio ACPI registers.
13 config SOC_AMD_COMMON_BLOCK_ACPI_ALIB
14         bool
16 config SOC_AMD_COMMON_BLOCK_ACPI_DPTC
17         bool
18         depends on SOC_AMD_COMMON_BLOCK_ACPI_ALIB
19         help
20           Selected by mainboards that implement support for ALIB
21           to enable DPTC.
23 config SOC_AMD_COMMON_BLOCK_ACPI_CPPC
24         bool
26 config SOC_AMD_COMMON_BLOCK_ACPI_CPU_POWER_STATE
27         bool
29 config SOC_AMD_COMMON_BLOCK_ACPI_GPIO
30         bool
32 config SOC_AMD_COMMON_BLOCK_ACPI_IVRS
33         bool
35 config SOC_AMD_COMMON_BLOCK_ACPI_MADT
36         bool
37         help
38           Select this to add the common AMD acpi_fill_madt implementation to
39           the build which adds the MADT entries for all non-FCH IOAPICs.
41 config ACPI_SSDT_PSD_INDEPENDENT
42         bool "Allow core p-state independent transitions"
43         default y
44         help
45           AMD recommends the ACPI _PSD object to be configured to cause
46           cores to transition between p-states independently. A vendor may
47           choose to generate _PSD object to allow cores to transition together.