src/soc/amd/common/block/acpi/cppc.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <acpi/acpi_pm.h>
   4 #include <acpi/acpigen.h>
   5 #include <amdblocks/cppc.h>
   6 #include <cpu/cpu.h>
   7 #include <soc/msr.h>
   8 #include <types.h>
   9
  10 static void cpu_init_cppc_config(struct cppc_config *config, u32 version)
  11 {
  12         uint32_t lowest_freq_mhz;
  13         uint32_t nominal_freq_mhz;
  14
  15         config->version = version;
  16
  17         config->entries[CPPC_HIGHEST_PERF]              = CPPC_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_HIGHEST_PERF, 8);
  18         config->entries[CPPC_NOMINAL_PERF]              = CPPC_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_NOMINAL_PERF, 8);
  19         config->entries[CPPC_LOWEST_NONL_PERF]          = CPPC_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_LOW_NON_LIN_PERF, 8);
  20         config->entries[CPPC_LOWEST_PERF]               = CPPC_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_LOWEST_PERF, 8);
  21         config->entries[CPPC_GUARANTEED_PERF]           = CPPC_UNSUPPORTED;
  22         config->entries[CPPC_DESIRED_PERF]              = CPPC_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_DES_PERF, 8);
  23         config->entries[CPPC_MIN_PERF]                  = CPPC_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_MIN_PERF, 8);
  24         config->entries[CPPC_MAX_PERF]                  = CPPC_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_MAX_PERF, 8);
  25         config->entries[CPPC_PERF_REDUCE_TOLERANCE]     = CPPC_UNSUPPORTED;
  26         config->entries[CPPC_TIME_WINDOW]               = CPPC_UNSUPPORTED;
  27         config->entries[CPPC_COUNTER_WRAP]              = CPPC_UNSUPPORTED;
  28         config->entries[CPPC_REF_PERF_COUNTER]          = CPPC_REG_MSR(MSR_MAX_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64);
  29         config->entries[CPPC_DELIVERED_PERF_COUNTER]    = CPPC_REG_MSR(MSR_ACTUAL_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64);
  30         config->entries[CPPC_PERF_LIMITED]              = CPPC_REG_MSR(MSR_CPPC_STATUS, 0, 2);
  31         config->entries[CPPC_ENABLE]                    = CPPC_REG_MSR(MSR_CPPC_ENABLE, 0, 1);
  32
  33         if (version < 2)
  34                 return;
  35
  36         config->entries[CPPC_AUTO_SELECT]               = CPPC_DWORD(1);
  37         config->entries[CPPC_AUTO_ACTIVITY_WINDOW]      = CPPC_UNSUPPORTED;
  38         config->entries[CPPC_PERF_PREF]                 = CPPC_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_ENERGY_PERF_PREF, 8);
  39         config->entries[CPPC_REF_PERF]                  = CPPC_UNSUPPORTED;
  40
  41         if (version < 3)
  42                 return;
  43
  44         config->entries[CPPC_LOWEST_FREQ]       =
  45                                 get_ccx_cppc_min_frequency(&lowest_freq_mhz) == CB_SUCCESS ?
  46                                 CPPC_DWORD(lowest_freq_mhz) : CPPC_UNSUPPORTED;
  47         config->entries[CPPC_NOMINAL_FREQ]      =
  48                                 get_ccx_cppc_nom_frequency(&nominal_freq_mhz) == CB_SUCCESS ?
  49                                 CPPC_DWORD(nominal_freq_mhz) : CPPC_UNSUPPORTED;
  50 }
  51
  52 void generate_cppc_entries(unsigned int core_id)
  53 {
  54         /* Generate GCPC package in first logical core */
  55         if (core_id == 0) {
  56                 struct cppc_config cppc_config;
  57                 cpu_init_cppc_config(&cppc_config, CPPC_VERSION_3);
  58                 acpigen_write_CPPC_package(&cppc_config);
  59         }
  60
  61         /* Write _CPC entry for each logical core */
  62         acpigen_write_CPPC_method();
  63 }