src/soc/amd/common/block/acpimmio/mmio_util.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <types.h>
   4 #include <arch/io.h>
   5 #include <amdblocks/acpimmio.h>
   6
   7 #if ENV_X86
   8 #include <amdblocks/acpimmio_map.h>
   9 #endif
  10
  11 #if ENV_X86 && CONSTANT_ACPIMMIO_BASE_ADDRESS
  12 #define DECLARE_ACPIMMIO(ptr, bank) \
  13         uint8_t *const ptr = (void *)(uintptr_t)ACPIMMIO_BASE(bank)
  14 #else
  15 #define DECLARE_ACPIMMIO(ptr, bank) uint8_t *ptr
  16 #endif
  17
  18 DECLARE_ACPIMMIO(acpimmio_aoac, AOAC);
  19 DECLARE_ACPIMMIO(acpimmio_iomux, IOMUX);
  20 DECLARE_ACPIMMIO(acpimmio_gpio0, GPIO0);
  21 DECLARE_ACPIMMIO(acpimmio_misc, MISC);
  22
  23 #if ENV_X86
  24 DECLARE_ACPIMMIO(acpimmio_gpio_100, GPIO_100);
  25 DECLARE_ACPIMMIO(acpimmio_smi, SMI);
  26 DECLARE_ACPIMMIO(acpimmio_pmio, PMIO);
  27 DECLARE_ACPIMMIO(acpimmio_pmio2, PMIO2);
  28 DECLARE_ACPIMMIO(acpimmio_biosram, BIOSRAM);
  29 DECLARE_ACPIMMIO(acpimmio_cmosram, CMOSRAM);
  30 DECLARE_ACPIMMIO(acpimmio_cmos, CMOS);
  31 DECLARE_ACPIMMIO(acpimmio_acpi, ACPI);
  32 DECLARE_ACPIMMIO(acpimmio_asf, ASF);
  33 DECLARE_ACPIMMIO(acpimmio_smbus, SMBUS);
  34 DECLARE_ACPIMMIO(acpimmio_wdt, WDT);
  35 DECLARE_ACPIMMIO(acpimmio_hpet, HPET);
  36 DECLARE_ACPIMMIO(acpimmio_remote_gpio, REMOTE_GPIO);
  37 DECLARE_ACPIMMIO(acpimmio_dpvga, DPVGA);
  38 DECLARE_ACPIMMIO(acpimmio_xhci_pm, XHCIPM);
  39 DECLARE_ACPIMMIO(acpimmio_acdc_tmr, ACDCTMR);
  40 #endif
  41
  42 #undef DECLARE_ACPIMMIO
  43
  44 void fch_enable_cf9_io(void)
  45 {
  46         pm_write32(PM_DECODE_EN, pm_read32(PM_DECODE_EN) | CF9_IO_EN);
  47 }
  48
  49 void fch_enable_legacy_io(void)
  50 {
  51         pm_write32(PM_DECODE_EN, pm_read32(PM_DECODE_EN) | LEGACY_IO_EN);
  52 }
  53
  54 void fch_disable_legacy_dma_io(void)
  55 {
  56         pm_write32(PM_DECODE_EN, pm_read32(PM_DECODE_EN) &
  57                 ~(LEGACY_DMA_IO_EN | LEGACY_DMA_IO_80_EN));
  58 }
  59
  60 void fch_enable_ioapic_decode(void)
  61 {
  62         pm_write32(PM_DECODE_EN, pm_read32(PM_DECODE_EN) | FCH_IOAPIC_EN);
  63 }
  64
  65 void fch_configure_hpet(void)
  66 {
  67         uint32_t reg = pm_read32(PM_DECODE_EN);
  68         reg |=  HPET_EN | HPET_MSI_EN;
  69         reg &= ~HPET_WIDTH_SEL; /* 32 bit HPET */
  70         pm_write32(PM_DECODE_EN, reg);
  71 }
  72
  73 void fch_disable_kb_rst(void)
  74 {
  75         pm_write8(PM_RST_CTRL1, pm_read8(PM_RST_CTRL1) & ~KBRSTEN);
  76 }