src/soc/amd/common/block/cpu/mca/mca.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <amdblocks/reset.h>
   4 #include <cpu/amd/msr.h>
   5 #include <cpu/x86/lapic.h>
   6 #include <cpu/x86/msr.h>
   7 #include <console/console.h>
   8 #include <types.h>
   9 #include "mca_common_defs.h"
  10
  11 bool mca_skip_check(void)
  12 {
  13         return !is_warm_reset();
  14 }
  15
  16 void mca_print_error(unsigned int bank)
  17 {
  18         msr_t msr;
  19
  20         printk(BIOS_WARNING, "#MC Error: core %u, bank %u %s\n", initial_lapicid(), bank,
  21                 mca_get_bank_name(bank));
  22
  23         msr = rdmsr(IA32_MC_STATUS(bank));
  24         printk(BIOS_WARNING, "   MC%u_STATUS =   %08x_%08x\n", bank, msr.hi, msr.lo);
  25         msr = rdmsr(IA32_MC_ADDR(bank));
  26         printk(BIOS_WARNING, "   MC%u_ADDR =     %08x_%08x\n", bank, msr.hi, msr.lo);
  27         msr = rdmsr(IA32_MC_MISC(bank));
  28         printk(BIOS_WARNING, "   MC%u_MISC =     %08x_%08x\n", bank, msr.hi, msr.lo);
  29         msr = rdmsr(IA32_MC_CTL(bank));
  30         printk(BIOS_WARNING, "   MC%u_CTL =      %08x_%08x\n", bank, msr.hi, msr.lo);
  31         msr = rdmsr(MC_CTL_MASK(bank));
  32         printk(BIOS_WARNING, "   MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo);
  33 }