ec/google/chromeec: Enable ACPI memory mapping for Microchip EC
[coreboot2.git] / src / soc / amd / common / block / include / amdblocks / gpio.h
blob6c4857d72379479705d83dc38e8a4224bafd5a36
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #ifndef AMD_BLOCK_GPIO_BANKS_H
4 #define AMD_BLOCK_GPIO_BANKS_H
6 #include <types.h>
7 #include <amdblocks/gpio_defs.h>
9 typedef uint32_t gpio_t;
11 struct soc_amd_gpio {
12 gpio_t gpio;
13 uint8_t function;
14 uint32_t control;
15 uint32_t flags;
18 struct soc_amd_gpio_register_save {
19 uint32_t control_value;
20 uint8_t mux_value;
23 struct soc_amd_event {
24 gpio_t gpio;
25 uint8_t event;
28 struct gpio_wake_state {
29 uint32_t control_switch;
30 uint32_t wake_stat[2];
31 /* Number of wake_gpio with a valid setting. */
32 uint32_t num_valid_wake_gpios;
33 /* GPIO index number that caused a wake. */
34 gpio_t wake_gpios[16];
37 /* Fill gpio_wake_state object for future event reporting. */
38 void gpio_fill_wake_state(struct gpio_wake_state *state);
39 /* Add gpio events to the eventlog. */
40 void gpio_add_events(void);
42 static inline bool is_gpio_event_level_triggered(uint32_t flags)
44 return (flags & GPIO_FLAG_EVENT_TRIGGER_MASK) == GPIO_FLAG_EVENT_TRIGGER_LEVEL;
47 static inline bool is_gpio_event_edge_triggered(uint32_t flags)
49 return (flags & GPIO_FLAG_EVENT_TRIGGER_MASK) == GPIO_FLAG_EVENT_TRIGGER_EDGE;
52 static inline bool is_gpio_event_active_high(uint32_t flags)
54 return (flags & GPIO_FLAG_EVENT_ACTIVE_MASK) == GPIO_FLAG_EVENT_ACTIVE_HIGH;
57 static inline bool is_gpio_event_active_low(uint32_t flags)
59 return (flags & GPIO_FLAG_EVENT_ACTIVE_MASK) == GPIO_FLAG_EVENT_ACTIVE_LOW;
63 * gpio_configure_pads_with_override accepts as input two GPIO tables:
64 * 1. Base config
65 * 2. Override config
67 * This function configures raw pads in base config and applies override in
68 * override config if any. Thus, for every GPIO_x in base config, this function
69 * looks up the GPIO in override config and if it is present there, then applies
70 * the configuration from override config. GPIOs that are only specified in the
71 * override, but not in the base configuration, will be ignored.
73 void gpio_configure_pads_with_override(const struct soc_amd_gpio *base_cfg,
74 size_t base_num_pads,
75 const struct soc_amd_gpio *override_cfg,
76 size_t override_num_pads);
78 /**
79 * @brief program a particular set of GPIO
81 * @param gpio_list_ptr = pointer to array of gpio configurations
82 * @param size = number of entries in array
84 * @return none
86 void gpio_configure_pads(const struct soc_amd_gpio *gpio_list_ptr, size_t size);
87 /* Return the interrupt status and clear if set. */
88 int gpio_interrupt_status(gpio_t gpio);
89 /* Implemented by soc, provides table of available GPIO mapping to Gevents */
90 void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items);
92 void gpio_save_pin_registers(gpio_t gpio, struct soc_amd_gpio_register_save *save);
93 void gpio_restore_pin_registers(gpio_t gpio, struct soc_amd_gpio_register_save *save);
95 /* Overrides Kconfig GPIO number */
96 gpio_t cr50_override_gpio(gpio_t irq);
98 #endif /* AMD_BLOCK_GPIO_BANKS_H */