src/soc/amd/common/block/iommu/iommu.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <amdblocks/iommu.h>
   4 #include <console/console.h>
   5 #include <device/device.h>
   6 #include <device/pci.h>
   7 #include <lib.h>
   8
   9 static void iommu_read_resources(struct device *dev)
  10 {
  11         struct resource *res;
  12
  13         /* Get the normal pci resources of this device */
  14         pci_dev_read_resources(dev);
  15
  16         /* IOMMU MMIO registers */
  17         res = new_resource(dev, IOMMU_CAP_BASE_LO);
  18         res->size = 512 * KiB;
  19         res->align = log2(res->size);
  20         res->gran = log2(res->size);
  21         res->limit = 0xffffffff;        /* 4G */
  22         res->flags = IORESOURCE_MEM;
  23 }
  24
  25
  26 static void iommu_enable_resources(struct device *dev)
  27 {
  28         uint32_t base = pci_read_config32(dev, IOMMU_CAP_BASE_LO);
  29         base |= IOMMU_ENABLE;
  30         pci_write_config32(dev, IOMMU_CAP_BASE_LO, base);
  31         printk(BIOS_DEBUG, "%s -> mmio enable: %08X", __func__,
  32                pci_read_config32(dev, IOMMU_CAP_BASE_LO));
  33         pci_dev_enable_resources(dev);
  34 }
  35
  36 #if CONFIG(HAVE_ACPI_TABLES)
  37 static const char *iommu_acpi_name(const struct device *dev)
  38 {
  39         return "IOMM";
  40 }
  41 #endif
  42
  43 struct device_operations amd_iommu_ops = {
  44         .read_resources = iommu_read_resources,
  45         .set_resources = pci_dev_set_resources,
  46         .enable_resources = iommu_enable_resources,
  47         .ops_pci = &pci_dev_ops_pci,
  48 #if CONFIG(HAVE_ACPI_TABLES)
  49         .acpi_name = iommu_acpi_name,
  50 #endif
  51 };