soc/mediatek/mt8196: Correct the region size for mcufw_reserved
[coreboot2.git] / src / soc / amd / common / block / psp / Makefile.mk
blobdc811f9098a87a7fdc398b8472f1f6bcdcaeeab7
1 ## SPDX-License-Identifier: GPL-2.0-only
2 ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PSP),y)
4 romstage-y += psp.c
5 ramstage-y += psp.c
6 smm-y += psp.c
7 smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_SMI) += psp_smi.c
8 smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_SMI) += psp_smi_flash.c
9 smm-y += psp_smm.c
11 bootblock-y += psp_efs.c
12 verstage-y += psp_efs.c
14 endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP
16 ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN1),y)
18 romstage-y += psp_gen1.c
19 ramstage-y += psp_gen1.c
21 smm-y += psp_gen1.c
22 smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_SMI) += psp_smi_flash_gen1.c
24 endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN1
26 ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN2),y)
28 romstage-y += psp_gen2.c
29 ramstage-y += psp_gen2.c
30 ramstage-$(CONFIG_PSP_PLATFORM_SECURE_BOOT) += psb.c
31 ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_I2C3_TPM_SHARED_WITH_PSP) += tpm.c
33 smm-y += psp_gen2.c
34 smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_SMI) += psp_smi_flash_gen2.c
35 smm-y += psp_smm_gen2.c
37 ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_RPMC) += rpmc.c
38 ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_SPL) += spl_fuse.c
40 endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN2