src/soc/amd/common/block/psp/rpmc.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <amdblocks/reset.h>
   4 #include <bootstate.h>
   5 #include <console/console.h>
   6 #include <types.h>
   7 #include "psp_def.h"
   8
   9 union psp_rpmc_caps {
  10         struct {
  11                 uint32_t psp_nvram_healthy              :  1; /* [ 0.. 0] */
  12                 uint32_t psp_nvram_rpmc_protected       :  1; /* [ 1.. 1] */
  13                 uint32_t                                :  8; /* [ 2.. 9] */
  14                 uint32_t spi_rpmc_slots_available       :  4; /* [10..13] */
  15                 uint32_t                                :  2; /* [14..15] */
  16                 uint32_t spi_rpmc_slot_used             :  4; /* [16..19] */
  17                 uint32_t psp_rpmc_slot_available        :  4; /* [20..23] */
  18                 uint32_t                                :  6; /* [24..29] */
  19                 uint32_t psp_rpmc_revision              :  2; /* [30..31] */
  20         } r0; /* RPMC revision 0: 4 RPMC fuse slots in SoC */
  21         struct {
  22                 uint32_t psp_nvram_healthy              :  1; /* [ 0.. 0] */
  23                 uint32_t psp_nvram_rpmc_protected       :  1; /* [ 1.. 1] */
  24                 uint32_t                                :  8; /* [ 2.. 9] */
  25                 uint32_t spi_rpmc_slots_available       :  4; /* [10..13] */
  26                 uint32_t                                :  2; /* [14..15] */
  27                 uint32_t spi_rpmc_slot_used             :  4; /* [16..19] */
  28                 uint32_t psp_rpmc_first_slot_available  :  7; /* [20..26] */
  29                 uint32_t psp_rpmc_all_slots_used        :  1; /* [27..27] */
  30                 uint32_t                                :  2; /* [28..29] */
  31                 uint32_t psp_rpmc_revision              :  2; /* [30..31] */
  32         } r1; /* RPMC revison 1: 16 RPMC fuse slots in SoC */
  33         uint32_t raw;
  34 };
  35
  36 enum psp_rpmc_revision {
  37         PSP_RPMC_REVISION_0 = 0,
  38         PSP_RPMC_REVISION_1 = 1,
  39 };
  40
  41 #define HSTI_STATE_RPMC_PRODUCTION_ENABLED      BIT(8)
  42 #define HSTI_STATE_RPMC_SPI_PRESENT             BIT(9)
  43
  44 static bool is_hsti_rpmc_provisioned(uint32_t hsti_state)
  45 {
  46         return hsti_state & HSTI_STATE_RPMC_PRODUCTION_ENABLED;
  47 }
  48
  49 static bool is_hsti_rpmc_spi_present(uint32_t hsti_state)
  50 {
  51         return hsti_state & HSTI_STATE_RPMC_SPI_PRESENT;
  52 }
  53
  54 static void print_hsti_rpmc_state(uint32_t hsti_state)
  55 {
  56         printk(BIOS_SPEW, "RPMC %s provisioned\n",
  57                is_hsti_rpmc_provisioned(hsti_state) ? "is" : "isn't");
  58         printk(BIOS_SPEW, "SPI flash %s RPMC\n",
  59                is_hsti_rpmc_spi_present(hsti_state) ? "supports" : "doesn't support");
  60 }
  61
  62 static enum psp_rpmc_revision get_rpmc_rev(union psp_rpmc_caps psp_caps)
  63 {
  64         /* Since the PSP RPMC revision field is in the same location for both revision 0 and 1,
  65            we can usethe r0 struct in both cases for this */
  66         return (enum psp_rpmc_revision)psp_caps.r0.psp_rpmc_revision;
  67 }
  68
  69 static void print_rpmc_general_status(uint8_t healthy, uint8_t rpmc_protected)
  70 {
  71         printk(BIOS_SPEW, "PSP RPMC NVRAM %s healthy\n", healthy ? "is" : "isn't");
  72         printk(BIOS_SPEW, "PSP RPMC NVRAM %s using RPMC protection\n",
  73                rpmc_protected ? "is" : " isn't");
  74 }
  75
  76 #define SPI_RPMC_COUNTER_COUNT  4
  77
  78 static void print_spi_rpmc_usage(uint8_t available, uint8_t used)
  79 {
  80         for (size_t i = 0; i < SPI_RPMC_COUNTER_COUNT; i++) {
  81                 printk(BIOS_SPEW, "SPI flash RPMC counter %zu %s provisioned\n", i,
  82                        available & BIT(i) ? "can still be" : "has already been");
  83         }
  84
  85         for (size_t i = 0; i < SPI_RPMC_COUNTER_COUNT; i++) {
  86                 printk(BIOS_SPEW, "SPI flash RPMC counter %zu is%s in use\n", i,
  87                        used & BIT(i) ? "" : " not");
  88         }
  89 }
  90
  91 #define PSP_RPMC_R0_SLOT_COUNT  4
  92
  93 static void print_rpmc_rev0_status(union psp_rpmc_caps psp_caps)
  94 {
  95         print_rpmc_general_status(psp_caps.r0.psp_nvram_healthy,
  96                                   psp_caps.r0.psp_nvram_rpmc_protected);
  97         print_spi_rpmc_usage(psp_caps.r0.spi_rpmc_slots_available,
  98                              psp_caps.r0.spi_rpmc_slot_used);
  99         for (size_t i = 0; i < PSP_RPMC_R0_SLOT_COUNT; i++) {
 100                 printk(BIOS_SPEW, "SoC RPMC slot %zu %s provisioned\n", i,
 101                        psp_caps.r0.psp_rpmc_slot_available & BIT(i) ? "can still be" :
 102                        "has already been");
 103         }
 104 }
 105
 106 static void print_rpmc_rev1_status(union psp_rpmc_caps psp_caps)
 107 {
 108         print_rpmc_general_status(psp_caps.r1.psp_nvram_healthy,
 109                                   psp_caps.r1.psp_nvram_rpmc_protected);
 110         print_spi_rpmc_usage(psp_caps.r1.spi_rpmc_slots_available,
 111                              psp_caps.r1.spi_rpmc_slot_used);
 112         if (psp_caps.r1.psp_rpmc_all_slots_used) {
 113                 printk(BIOS_SPEW, "All SoC RPMC slots already used\n");
 114         } else {
 115                 printk(BIOS_SPEW, "First available SoC RPMC slot is %d\n",
 116                        psp_caps.r1.psp_rpmc_first_slot_available);
 117         }
 118 }
 119
 120 static void psp_rpmc_report_status(union psp_rpmc_caps psp_caps, uint32_t hsti_state)
 121 {
 122         const enum psp_rpmc_revision rev = get_rpmc_rev(psp_caps);
 123
 124         print_hsti_rpmc_state(hsti_state);
 125
 126         printk(BIOS_SPEW, "RPMC revision %d\n", rev);
 127
 128         switch (rev) {
 129         case PSP_RPMC_REVISION_0:
 130                 print_rpmc_rev0_status(psp_caps);
 131                 break;
 132         case PSP_RPMC_REVISION_1:
 133                 print_rpmc_rev1_status(psp_caps);
 134                 break;
 135         default:
 136                 printk(BIOS_WARNING, "Unexpected RPMC revision\n");
 137         }
 138 }
 139
 140 static bool is_psp_rpmc_slot_available(union psp_rpmc_caps psp_caps)
 141 {
 142         const enum psp_rpmc_revision rev = get_rpmc_rev(psp_caps);
 143
 144         switch (rev) {
 145         case PSP_RPMC_REVISION_0:
 146                 /*
 147                  * psp_rpmc_slot_available doesn't contain the number of available slots, but
 148                  * one bit for each slot. When none of those bits is set, there are no usable
 149                  * slots any more
 150                  */
 151                 return psp_caps.r0.psp_rpmc_slot_available != 0;
 152         case PSP_RPMC_REVISION_1:
 153                 return !psp_caps.r1.psp_rpmc_all_slots_used;
 154         default:
 155                 return false;
 156         }
 157 }
 158
 159 static enum cb_err get_first_available_spi_rpmc_counter(union psp_rpmc_caps psp_caps,
 160                                                         uint32_t *rpmc_counter_address)
 161 {
 162         const enum psp_rpmc_revision rev = get_rpmc_rev(psp_caps);
 163         uint8_t spi_rpmc_available;
 164         unsigned int i;
 165
 166         switch (rev) {
 167         case PSP_RPMC_REVISION_0:
 168                 spi_rpmc_available = psp_caps.r0.spi_rpmc_slots_available;
 169                 break;
 170         case PSP_RPMC_REVISION_1:
 171                 spi_rpmc_available = psp_caps.r1.spi_rpmc_slots_available;
 172                 break;
 173         default:
 174                 return CB_ERR;
 175         }
 176
 177         for (i = 0; i < SPI_RPMC_COUNTER_COUNT; i++) {
 178                 if (spi_rpmc_available & BIT(i)) {
 179                         *rpmc_counter_address = i;
 180                         return CB_SUCCESS;
 181                 }
 182         }
 183
 184         /* No RPMC counter available any more in the SPI flash */
 185         return CB_ERR;
 186 }
 187
 188 static void psp_rpmc_provision(union psp_rpmc_caps psp_caps, uint32_t hsti_state)
 189 {
 190         uint32_t rpmc_counter_addr = 0;
 191
 192         if (is_hsti_rpmc_provisioned(hsti_state))
 193                 return;
 194
 195         if (!is_hsti_rpmc_spi_present(hsti_state)) {
 196                 printk(BIOS_ERR, "SPI flash doesn't support RPMC\n");
 197                 return;
 198         }
 199
 200         if (!is_psp_rpmc_slot_available(psp_caps)) {
 201                 printk(BIOS_ERR, "No more RPMC provisioning slots available on this SoC\n");
 202                 return;
 203         }
 204
 205         if (get_first_available_spi_rpmc_counter(psp_caps, &rpmc_counter_addr) != CB_SUCCESS) {
 206                 printk(BIOS_ERR,
 207                        "No more RPMC conters available for provisioning in the SPI flash\n");
 208                 return;
 209         }
 210
 211         struct mbox_cmd_set_rpmc_address_buffer buffer = {
 212                 .header = {
 213                         .size = sizeof(buffer)
 214                 },
 215                 .address = rpmc_counter_addr,
 216         };
 217
 218         printk(BIOS_DEBUG, "RPMC: perform fusing using RPMC counter address %d\n",
 219                rpmc_counter_addr);
 220
 221         const int cmd_status = send_psp_command(MBOX_BIOS_CMD_SET_RPMC_ADDRESS, &buffer);
 222
 223         psp_print_cmd_status(cmd_status, &buffer.header);
 224
 225         if (cmd_status) {
 226                 printk(BIOS_ERR, "RPMC: Fusing request failed\n");
 227                 return;
 228         }
 229
 230         printk(BIOS_NOTICE, "RPMC: Rebooting\n");
 231         /* Reboot so that the PSP will do the actual provisioning and fusing */
 232         warm_reset();
 233 }
 234
 235 static void psp_rpmc_configuration(void *unused)
 236 {
 237         union psp_rpmc_caps psp_caps;
 238         uint32_t hsti_state;
 239
 240         if (psp_get_psp_capabilities(&psp_caps.raw) != CB_SUCCESS ||
 241             psp_get_hsti_state(&hsti_state) != CB_SUCCESS) {
 242                 printk(BIOS_ERR, "Getting RPMC state from PSP failed.\n");
 243                 return;
 244         }
 245
 246         psp_rpmc_report_status(psp_caps, hsti_state);
 247
 248         if (CONFIG(PERFORM_RPMC_PROVISIONING))
 249                 psp_rpmc_provision(psp_caps, hsti_state);
 250 }
 251
 252 BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_ENTRY, psp_rpmc_configuration, NULL);