soc/intel/pantherlake: Add core scaling factors read support
[coreboot2.git] / src / soc / amd / genoa_poc / fw.cfg
blobd8297fda368a008684b429cce4f6de4928386e39
1 # PSP fw config file
2 FIRMWARE_LOCATION     3rdparty/amd_blobs/genoa/PSP
3 SOC_NAME              Genoa
5 # type                file
6 # PSP
7 AMD_PUBKEY_FILE       Typex0_0_0_0_AmdPubKey.bin
8 PSPBTLDR_FILE         Typex1_0_0_0_PspBootLoader.bin Lbb
9 PSPRCVR_FILE          Typex3_0_0_0_PspRecBL.bin
10 PSP_SMUFW1_SUB0_FILE  Typex8_0_0_0_Smu.bin
11 PSP_SMUFW1_SUB1_FILE  Typex8_0_0_1_Smu.bin
12 PSP_SMUFW1_SUB2_FILE  Typex8_0_0_2_Smu.bin
13 PSPSECUREDEBUG_FILE   Typex9_0_0_0_DbgKey.bin
14 PSP_OEM_ABL_KEY_FILE  Typexa_0_0_0_OemAblKey.bin
15 PSP_SMUFW2_SUB0_FILE  Typex12_0_0_0_Smu2.bin
16 PSP_SMUFW2_SUB1_FILE  Typex12_0_0_1_Smu2.bin
17 PSP_SMUFW2_SUB2_FILE  Typex12_0_0_2_Smu2.bin Lbb
18 PSP_SEC_DEBUG_FILE    Typex13_0_0_0_PspEarlyUnlock.bin Lbb
19 PSP_IKEK_FILE         Typex21_0_0_0_ikek.bin
20 PSP_TOKEN_UNLOCK_FILE Typex22_0_0_0_PspTokenUnlockData.bin
21 PSP_SECG0_FILE        Typex24_0_0_0_SecureGasket.bin
22 PSP_SECG1_FILE        Typex24_0_0_1_SecureGasket.bin
23 PSP_SECG2_FILE        Typex24_0_0_2_SecureGasket.bin
24 PSP_MP5FW_SUB0_FILE   Typex2a_0_0_0_Mp5Fw.bin
25 PSP_MP5FW_SUB1_FILE   Typex2a_0_0_1_Mp5Fw.bin
26 PSP_MP5FW_SUB2_FILE   Typex2a_0_0_2_Mp5Fw.bin
27 PSP_ABL0_FILE         Typex30_0_0_0_PspAgesaBL0.bin
28 SEV_CODE_FILE         Typex39_0_0_0_SevCode.bin
29 SEV_DATA_FILE         Typex38_0_0_0_SevData.bin
30 PSP_DXIOFW_FILE       Typex42_0_0_0_DxioFw.bin
31 UNIFIEDUSB_FILE       Typex44_0_0_0_UsbPhyFw.bin
32 DRTMTA_FILE           Typex47_0_0_0_DrtmTa.bin
33 KEYDBBL_FILE          Typex50_0_0_0_PspBlPubKey.bin
34 SPL_TABLE_FILE        Typex55_0_0_0_BLAntiRB.bin Lbb
35 PSP_MPIOFW_FILE       Typex5d_0_0_0_MPIOOffchipFW.bin
36 PSP_RIB_FILE_SUB0     Typex76_0_0_0_RIB.bin
37 PSP_MPDMATFFW_FILE    Typex8c_0_0_0_MpdmaTfFw.bin
38 PSP_GMI3PHYFW_FILE    Typex91_0_0_0_Gmi3PhyFw.bin
39 PSP_MPDMAPMFW_FILE    Typex92_0_0_0_MpdmaPmFw.bin
40 AMD_FUSE_CHAIN        Dummy Lbb
42 # BDT
43 PSP_PMUI_FILE_SUB0_INS3 Typex64_0_3_0_PmuCode.bin
44 PSP_PMUI_FILE_SUB0_INS4 Typex64_0_4_0_PmuCode.bin
45 PSP_PMUI_FILE_SUB0_INS9 Typex64_0_9_0_PmuCode.bin
46 PSP_PMUI_FILE_SUB0_INSA Typex64_0_a_0_PmuCode.bin
47 PSP_PMUI_FILE_SUB0_INSB Typex64_0_b_0_PmuCode.bin
48 PSP_PMUD_FILE_SUB0_INS3 Typex65_0_3_0_PmuData.bin
49 PSP_PMUD_FILE_SUB0_INS4 Typex65_0_4_0_PmuData.bin
50 PSP_PMUD_FILE_SUB0_INS9 Typex65_0_9_0_PmuData.bin
51 PSP_PMUD_FILE_SUB0_INSA Typex65_0_a_0_PmuData.bin
52 PSP_PMUD_FILE_SUB0_INSB Typex65_0_b_0_PmuData.bin
53 PSP_PMUD_FILE_SUB0_INSC Typex65_0_c_0_PmuData.bin
54 # TODO: Typex69_0_0_0_EarlyVgaImage.bin