src/soc/amd/glinda/Makefile.mk

   1 # SPDX-License-Identifier: BSD-3-Clause
   2
   3 # TODO: Move as much as possible to common
   4 # TODO: Update for Glinda
   5
   6 ifeq ($(CONFIG_SOC_AMD_GLINDA),y)
   7
   8 subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage
   9
  10 # Beware that all-y also adds the compilation unit to verstage on PSP
  11 all-y           += aoac.c
  12 all-y           += config.c
  13 all-y           += i2c.c
  14
  15 # all_x86-y adds the compilation unit to all stages that run on the x86 cores
  16 all_x86-y       += gpio.c
  17 all_x86-y       += uart.c
  18
  19 bootblock-y     += early_fch.c
  20 bootblock-y     += espi_util.c
  21
  22 verstage-y      += espi_util.c
  23
  24 romstage-y      += fsp_m_params.c
  25
  26 ramstage-y      += acpi.c
  27 ramstage-y      += chip.c
  28 ramstage-y      += cpu.c
  29 ramstage-y      += fch.c
  30 ramstage-y      += fsp_s_params.c
  31 ramstage-y      += mca.c
  32 ramstage-y      += memmap.c
  33 ramstage-y      += root_complex.c
  34 ramstage-y      += xhci.c
  35
  36 smm-y           += gpio.c
  37 smm-y           += root_complex.c
  38 smm-y           += smihandler.c
  39 smm-$(CONFIG_DEBUG_SMI) += uart.c
  40
  41 CPPFLAGS_common += -I$(src)/soc/amd/glinda/include
  42 CPPFLAGS_common += -I$(src)/soc/amd/glinda/acpi
  43 CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/glinda
  44 CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
  45
  46 # Building the cbfs image will fail if the offset, aligned to 64 bytes, isn't large enough
  47 ifeq ($(CONFIG_CBFS_VERIFICATION),y)
  48 # 0x80 accounts for the cbfs_file struct + filename + metadata structs
  49 AMD_FW_AB_POSITION := 0x80
  50 else # ($(CONFIG_CBFS_VERIFICATION), y)
  51 # 0x40 accounts for the cbfs_file struct + filename + metadata structs without hash attribute
  52 AMD_FW_AB_POSITION := 0x40
  53 endif # ($(CONFIG_CBFS_VERIFICATION), y)
  54
  55 GLINDA_FW_A_POSITION=$(call int-add, \
  56         $(call get_fmap_value,FMAP_SECTION_FW_MAIN_A_START) $(AMD_FW_AB_POSITION))
  57
  58 GLINDA_FW_B_POSITION=$(call int-add, \
  59         $(call get_fmap_value,FMAP_SECTION_FW_MAIN_B_START) $(AMD_FW_AB_POSITION))
  60 #
  61 # PSP Directory Table items
  62 #
  63 # Certain ordering requirements apply, however these are ensured by amdfwtool.
  64 # For more information see "AMD Platform Security Processor BIOS Architecture
  65 # Design Guide for AMD Family 17h Processors" (PID #55758, NDA only).
  66 #
  67
  68 ifeq ($(CONFIG_PSP_DISABLE_POSTCODES),y)
  69 PSP_SOFTFUSE_BITS += 7
  70 endif
  71
  72 ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y)
  73 # Enable secure debug unlock
  74 PSP_SOFTFUSE_BITS += 0
  75 OPT_TOKEN_UNLOCK="--token-unlock"
  76 endif
  77
  78 ifeq ($(CONFIG_PSP_LOAD_MP2_FW),y)
  79 OPT_PSP_LOAD_MP2_FW="--load-mp2-fw"
  80 else
  81 # Disable MP2 firmware loading
  82 PSP_SOFTFUSE_BITS += 29
  83 endif
  84
  85 # Use additional Soft Fuse bits specified in Kconfig
  86 PSP_SOFTFUSE_BITS += $(call strip_quotes, $(CONFIG_PSP_SOFTFUSE_BITS))
  87
  88 # type = 0x04
  89 # The flashmap section used for this is expected to be named PSP_NVRAM
  90 PSP_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_START)
  91 PSP_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_SIZE)
  92
  93 # type = 0x3a
  94 ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y)
  95 PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE)
  96 endif
  97
  98 # type = 0x54
  99 # The flashmap section used for this is expected to be named PSP_RPMC_NVRAM
 100 PSP_RPMC_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_START)
 101 PSP_RPMC_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_SIZE)
 102
 103 # type = 0x55
 104 SPL_TABLE_FILE=$(CONFIG_SPL_TABLE_FILE)
 105 ifeq ($(CONFIG_HAVE_SPL_RW_AB_FILE),y)
 106 SPL_RW_AB_TABLE_FILE=$(CONFIG_SPL_RW_AB_TABLE_FILE)
 107 else
 108 SPL_RW_AB_TABLE_FILE=$(CONFIG_SPL_TABLE_FILE)
 109 endif
 110
 111 #
 112 # BIOS Directory Table items - proper ordering is managed by amdfwtool
 113 #
 114
 115 # type = 0x60
 116 PSP_APCB_FILES=$(APCB_SOURCES) $(APCB_SOURCES_RECOVERY)
 117
 118 # type = 0x61
 119 PSP_APOB_BASE=$(CONFIG_PSP_APOB_DRAM_ADDRESS)
 120
 121 # type = 0x62
 122 PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img
 123 PSP_ELF_FILE=$(objcbfs)/bootblock.elf
 124 PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}')
 125 PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}')
 126
 127 ifneq ($(CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE),y)
 128 # type = 0x63 - construct APOB NV base/size from flash map
 129 # The flashmap section used for this is expected to be named RW_MRC_CACHE
 130 APOB_NV_SIZE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_SIZE)
 131 APOB_NV_BASE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START)
 132 endif # !CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE
 133
 134 ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)
 135 # type = 0x6B - PSP Shared memory location
 136 ifneq ($(CONFIG_PSP_SHAREDMEM_SIZE),0x0)
 137 PSP_SHAREDMEM_SIZE=$(CONFIG_PSP_SHAREDMEM_SIZE)
 138 PSP_SHAREDMEM_BASE=$(shell awk '$$3 == "_psp_sharedmem_dram" {printf "0x" $$1}' $(objcbfs)/bootblock.map)
 139 endif
 140
 141 # type = 0x52 - PSP Bootloader Userspace Application (verstage)
 142 PSP_VERSTAGE_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_FILE))
 143 PSP_VERSTAGE_SIG_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_SIGNING_TOKEN))
 144 endif # CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK
 145
 146 ifeq ($(CONFIG_SEPARATE_SIGNED_PSPFW),y)
 147 SIGNED_AMDFW_A_POSITION=$(call int-subtract, \
 148         $(call get_fmap_value,FMAP_SECTION_SIGNED_AMDFW_A_START) \
 149         $(call get_fmap_value,FMAP_SECTION_FLASH_START))
 150 SIGNED_AMDFW_B_POSITION=$(call int-subtract, \
 151         $(call get_fmap_value,FMAP_SECTION_SIGNED_AMDFW_B_START) \
 152         $(call get_fmap_value,FMAP_SECTION_FLASH_START))
 153 SIGNED_AMDFW_A_FILE=$(obj)/amdfw_a.rom.signed
 154 SIGNED_AMDFW_B_FILE=$(obj)/amdfw_b.rom.signed
 155 endif # CONFIG_SEPARATE_SIGNED_PSPFW
 156
 157 # Helper function to return a value with given bit set
 158 # Soft Fuse type = 0xb - See #55758 (NDA) for bit definitions.
 159 set-bit=$(call int-shift-left, 1 $(call _toint,$1))
 160 PSP_SOFTFUSE=$(shell A=$(call int-add, \
 161                 $(foreach bit,$(sort $(PSP_SOFTFUSE_BITS)),$(call set-bit,$(bit)))); printf "0x%x" $$A)
 162
 163 #
 164 # Build the arguments to amdfwtool (order is unimportant).  Missing file names
 165 # result in empty OPT_ variables, i.e. the argument is not passed to amdfwtool.
 166 #
 167
 168 add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
 169
 170 OPT_PSP_NVRAM_BASE=$(call add_opt_prefix, $(PSP_NVRAM_BASE), --nvram-base)
 171 OPT_PSP_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_NVRAM_SIZE), --nvram-size)
 172
 173 OPT_PSP_RPMC_NVRAM_BASE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_BASE), --rpmc-nvram-base)
 174 OPT_PSP_RPMC_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_SIZE), --rpmc-nvram-size)
 175
 176 OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage)
 177 OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig)
 178
 179 OPT_PSP_APCB_FILES= $(if $(APCB_SOURCES), --instance 0 --apcb $(APCB_SOURCES)) \
 180                     $(if $(APCB_SOURCES_RECOVERY), --instance 10 --apcb $(APCB_SOURCES_RECOVERY)) \
 181                     $(if $(APCB_SOURCES_68), --instance 18 --apcb $(APCB_SOURCES_68))
 182
 183 OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base)
 184 OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin)
 185 OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest)
 186 OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size)
 187
 188 OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem)
 189 OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size)
 190 OPT_APOB_NV_SIZE=$(call add_opt_prefix, $(APOB_NV_SIZE), --apob-nv-size)
 191 OPT_APOB_NV_BASE=$(call add_opt_prefix, $(APOB_NV_BASE),--apob-nv-base)
 192 OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode)
 193 OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed)
 194 OPT_EFS_SPI_MICRON_FLAG=$(call add_opt_prefix, $(CONFIG_EFS_SPI_MICRON_FLAG), --spi-micron-flag)
 195
 196 OPT_SIGNED_AMDFW_A_POSITION=$(call add_opt_prefix, $(SIGNED_AMDFW_A_POSITION), --signed-addr)
 197 OPT_SIGNED_AMDFW_A_FILE=$(call add_opt_prefix, $(SIGNED_AMDFW_A_FILE), --signed-output)
 198 OPT_SIGNED_AMDFW_B_POSITION=$(call add_opt_prefix, $(SIGNED_AMDFW_B_POSITION), --signed-addr)
 199 OPT_SIGNED_AMDFW_B_FILE=$(call add_opt_prefix, $(SIGNED_AMDFW_B_FILE), --signed-output)
 200
 201 OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse)
 202
 203 OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist)
 204 OPT_SPL_TABLE_FILE=$(call add_opt_prefix, $(SPL_TABLE_FILE), --spl-table)
 205 OPT_SPL_RW_AB_TABLE_FILE=$(call add_opt_prefix, $(SPL_RW_AB_TABLE_FILE), --spl-table)
 206
 207 # If vboot uses 2 RW slots, then 2 copies of PSP binaries are redundant
 208 OPT_RECOVERY_AB_SINGLE_COPY=$(if $(CONFIG_VBOOT_SLOTS_RW_AB), --recovery-ab-single-copy)
 209
 210 AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \
 211                 $(OPT_PSP_NVRAM_BASE) \
 212                 $(OPT_PSP_NVRAM_SIZE) \
 213                 $(OPT_PSP_RPMC_NVRAM_BASE) \
 214                 $(OPT_PSP_RPMC_NVRAM_SIZE) \
 215                 $(OPT_APOB_ADDR) \
 216                 $(OPT_DEBUG_AMDFWTOOL) \
 217                 $(OPT_PSP_BIOSBIN_FILE) \
 218                 $(OPT_PSP_BIOSBIN_DEST) \
 219                 $(OPT_PSP_BIOSBIN_SIZE) \
 220                 $(OPT_PSP_SOFTFUSE) \
 221                 $(OPT_PSP_LOAD_MP2_FW) \
 222                 --use-pspsecureos \
 223                 --load-s0i3 \
 224                 $(OPT_TOKEN_UNLOCK) \
 225                 $(OPT_WHITELIST_FILE) \
 226                 $(OPT_PSP_SHAREDMEM_BASE) \
 227                 $(OPT_PSP_SHAREDMEM_SIZE) \
 228                 $(OPT_EFS_SPI_READ_MODE) \
 229                 $(OPT_EFS_SPI_SPEED) \
 230                 $(OPT_EFS_SPI_MICRON_FLAG) \
 231                 --config $(CONFIG_AMDFW_CONFIG_FILE) \
 232                 --flashsize $(CONFIG_ROM_SIZE) \
 233                 $(OPT_RECOVERY_AB_SINGLE_COPY)
 234
 235 $(obj)/amdfw.rom:       $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \
 236                         $(PSP_VERSTAGE_FILE) \
 237                         $(PSP_VERSTAGE_SIG_FILE) \
 238                         $$(PSP_APCB_FILES) \
 239                         $(DEP_FILES) \
 240                         $(AMDFWTOOL) \
 241                         $(obj)/fmap_config.h \
 242                         $(objcbfs)/bootblock.elf # this target also creates the .map file
 243         rm -f $@
 244         @printf "    AMDFWTOOL  $(subst $(obj)/,,$(@))\n"
 245         $(AMDFWTOOL) \
 246                 $(AMDFW_COMMON_ARGS) \
 247                 $(OPT_APOB_NV_SIZE) \
 248                 $(OPT_APOB_NV_BASE) \
 249                 $(OPT_VERSTAGE_FILE) \
 250                 $(OPT_VERSTAGE_SIG_FILE) \
 251                 $(OPT_SPL_TABLE_FILE) \
 252                 --location $(CONFIG_AMD_FWM_POSITION) \
 253                 --output $@
 254
 255 $(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
 256         rm -f $@
 257         @printf "    AMDCOMPRS  $(subst $(obj)/,,$(@))\n"
 258         $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \
 259                 --maxsize $(PSP_BIOSBIN_SIZE)
 260
 261 $(obj)/amdfw_a.rom: $(obj)/amdfw.rom
 262         rm -f $@
 263         @printf "    AMDFWTOOL  $(subst $(obj)/,,$(@))\n"
 264         $(AMDFWTOOL) \
 265                 $(AMDFW_COMMON_ARGS) \
 266                 $(OPT_APOB_NV_SIZE) \
 267                 $(OPT_APOB_NV_BASE) \
 268                 $(OPT_SPL_RW_AB_TABLE_FILE) \
 269                 $(OPT_SIGNED_AMDFW_A_POSITION) \
 270                 $(OPT_SIGNED_AMDFW_A_FILE) \
 271                 --location $(call _tohex,$(GLINDA_FW_A_POSITION)) \
 272                 --anywhere \
 273                 --output $@
 274
 275 $(obj)/amdfw_b.rom: $(obj)/amdfw.rom
 276         rm -f $@
 277         @printf "    AMDFWTOOL  $(subst $(obj)/,,$(@))\n"
 278         $(AMDFWTOOL) \
 279                 $(AMDFW_COMMON_ARGS) \
 280                 $(OPT_APOB_NV_SIZE) \
 281                 $(OPT_APOB_NV_BASE) \
 282                 $(OPT_SPL_RW_AB_TABLE_FILE) \
 283                 $(OPT_SIGNED_AMDFW_B_POSITION) \
 284                 $(OPT_SIGNED_AMDFW_B_FILE) \
 285                 --location $(call _tohex,$(GLINDA_FW_B_POSITION)) \
 286                 --anywhere \
 287                 --output $@
 288
 289
 290 ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy)
 291 cbfs-files-y += apu/amdfw_a
 292 apu/amdfw_a-file := $(obj)/amdfw_a.rom
 293 apu/amdfw_a-position := $(AMD_FW_AB_POSITION)
 294 apu/amdfw_a-type := raw
 295
 296 cbfs-files-y += apu/amdfw_b
 297 apu/amdfw_b-file := $(obj)/amdfw_b.rom
 298 apu/amdfw_b-position := $(AMD_FW_AB_POSITION)
 299 apu/amdfw_b-type := raw
 300
 301 ifeq ($(CONFIG_SEPARATE_SIGNED_PSPFW),y)
 302 build_complete:: $(obj)/amdfw_a.rom $(obj)/amdfw_b.rom
 303         @printf "    Adding Signed ROM and HASH\n"
 304         $(CBFSTOOL) $(obj)/coreboot.rom write -u -r SIGNED_AMDFW_A -i 0 -f $(obj)/amdfw_a.rom.signed
 305         $(CBFSTOOL) $(obj)/coreboot.rom write -u -r SIGNED_AMDFW_B -i 0 -f $(obj)/amdfw_b.rom.signed
 306         $(CBFSTOOL) $(obj)/coreboot.rom add -r FW_MAIN_A -f $(obj)/amdfw_a.rom.signed.hash \
 307                 -n apu/amdfw_a_hash -t raw
 308         $(CBFSTOOL) $(obj)/coreboot.rom add -r FW_MAIN_B -f $(obj)/amdfw_b.rom.signed.hash \
 309                 -n apu/amdfw_b_hash -t raw
 310 endif # CONFIG_SEPARATE_SIGNED_PSPFW
 311 endif
 312
 313 endif # ($(CONFIG_SOC_AMD_GLINDA),y)