soc/intel/pantherlake: Add core scaling factors read support
[coreboot2.git] / src / soc / amd / glinda / acpi.c
blobdbe610cb89106644e6b5d1c382a7ad5d70ed3ae6
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 /* TODO: Update for Glinda */
4 /* TODO: See what can be made common */
6 /* ACPI - create the Fixed ACPI Description Tables (FADT) */
8 #include <acpi/acpi.h>
9 #include <acpi/acpigen.h>
10 #include <amdblocks/acpi.h>
11 #include <amdblocks/cppc.h>
12 #include <amdblocks/cpu.h>
13 #include <amdblocks/acpimmio.h>
14 #include <amdblocks/ioapic.h>
15 #include <arch/ioapic.h>
16 #include <arch/smp/mpspec.h>
17 #include <console/console.h>
18 #include <cpu/amd/cpuid.h>
19 #include <device/device.h>
20 #include <soc/iomap.h>
21 #include <static.h>
22 #include <types.h>
23 #include "chip.h"
26 * Reference section 5.2.9 Fixed ACPI Description Table (FADT)
27 * in the ACPI 3.0b specification.
29 void acpi_fill_fadt(acpi_fadt_t *fadt)
31 const struct soc_amd_glinda_config *cfg = config_of_soc();
33 printk(BIOS_DEBUG, "pm_base: 0x%04x\n", ACPI_IO_BASE);
35 fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK;
36 fadt->pm1a_cnt_blk = ACPI_PM1_CNT_BLK;
37 fadt->pm_tmr_blk = ACPI_PM_TMR_BLK;
38 fadt->gpe0_blk = ACPI_GPE0_BLK;
40 fadt->pm1_evt_len = 4; /* 32 bits */
41 fadt->pm1_cnt_len = 2; /* 16 bits */
42 fadt->pm_tmr_len = 4; /* 32 bits */
43 fadt->gpe0_blk_len = 8; /* 64 bits */
45 fill_fadt_extended_pm_io(fadt);
47 fadt->iapc_boot_arch = cfg->common_config.fadt_boot_arch; /* legacy free default */
48 fadt->flags |= ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */
49 ACPI_FADT_C1_SUPPORTED |
50 ACPI_FADT_S4_RTC_WAKE |
51 ACPI_FADT_32BIT_TIMER |
52 ACPI_FADT_PCI_EXPRESS_WAKE |
53 ACPI_FADT_PLATFORM_CLOCK |
54 ACPI_FADT_S4_RTC_VALID |
55 ACPI_FADT_REMOTE_POWER_ON;
56 if (cfg->s0ix_enable)
57 fadt->flags |= ACPI_FADT_LOW_PWR_IDLE_S0;
59 fadt->flags |= cfg->common_config.fadt_flags; /* additional board-specific flags */
62 unsigned long soc_acpi_write_tables(const struct device *device, unsigned long current,
63 acpi_rsdp_t *rsdp)
65 /* IVRS */
66 current = acpi_add_ivrs_table(current, rsdp);
68 if (CONFIG(PLATFORM_USES_FSP2_0))
69 current = acpi_add_fsp_tables(current, rsdp);
71 return current;
74 const acpi_cstate_t cstate_cfg_table[] = {
75 [0] = {
76 .ctype = 1,
77 .latency = 1,
78 .power = 0,
80 [1] = {
81 .ctype = 2,
82 .latency = 0x12,
83 .power = 0,
85 [2] = {
86 .ctype = 3,
87 .latency = 350,
88 .power = 0,
92 const acpi_cstate_t *get_cstate_config_data(size_t *size)
94 *size = ARRAY_SIZE(cstate_cfg_table);
95 return cstate_cfg_table;