src/soc/amd/glinda/i2c.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 /* TODO: Update for Glinda */
   4
   5 #include <amdblocks/i2c.h>
   6 #include <console/console.h>
   7 #include <soc/i2c.h>
   8 #include <soc/southbridge.h>
   9 #include <static.h>
  10 #include "chip.h"
  11
  12 /* Table to switch SCL pins to outputs to initially reset the I2C peripherals */
  13 static const struct soc_i2c_scl_pin i2c_scl_pins[] = {
  14         I2C_RESET_SCL_PIN(I2C0_SCL_PIN, GPIO_I2C0_SCL),
  15         I2C_RESET_SCL_PIN(I2C1_SCL_PIN, GPIO_I2C1_SCL),
  16         I2C_RESET_SCL_PIN(I2C2_SCL_PIN, GPIO_I2C2_SCL),
  17         I2C_RESET_SCL_PIN(I2C3_SCL_PIN, GPIO_I2C3_SCL),
  18 };
  19
  20 #if ENV_X86
  21 static const struct soc_i2c_ctrlr_info i2c_ctrlr[I2C_CTRLR_COUNT] = {
  22         { I2C_MASTER_MODE, APU_I2C0_BASE, "I2C0" },
  23         { I2C_MASTER_MODE, APU_I2C1_BASE, "I2C1" },
  24         { I2C_MASTER_MODE, APU_I2C2_BASE, "I2C2" },
  25         { I2C_MASTER_MODE, APU_I2C3_BASE, "I2C3" }
  26 };
  27 #else
  28 static struct soc_i2c_ctrlr_info i2c_ctrlr[I2C_CTRLR_COUNT] = {
  29         { I2C_MASTER_MODE, 0, "" },
  30         { I2C_MASTER_MODE, 0, "" },
  31         { I2C_MASTER_MODE, 0, "" },
  32         { I2C_MASTER_MODE, 0, "" }
  33 };
  34
  35 void i2c_set_bar(unsigned int bus, uintptr_t bar)
  36 {
  37         if (bus >= ARRAY_SIZE(i2c_ctrlr)) {
  38                 printk(BIOS_ERR, "i2c index out of bounds: %u.", bus);
  39                 return;
  40         }
  41
  42         i2c_ctrlr[bus].bar = bar;
  43 }
  44 #endif
  45
  46 void reset_i2c_peripherals(void)
  47 {
  48         const struct soc_amd_glinda_config *cfg = config_of_soc();
  49         struct soc_i2c_peripheral_reset_info reset_info;
  50
  51         reset_info.i2c_scl_reset_mask = cfg->i2c_scl_reset & GPIO_I2C_MASK;
  52         reset_info.i2c_scl = i2c_scl_pins;
  53         reset_info.num_pins = ARRAY_SIZE(i2c_scl_pins);
  54         sb_reset_i2c_peripherals(&reset_info);
  55 }
  56
  57 void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg)
  58 {
  59         const struct soc_amd_glinda_config *config = config_of_soc();
  60
  61         if (bus >= ARRAY_SIZE(config->i2c_pad))
  62                 return;
  63
  64         fch_i23c_pad_init(bus, cfg->speed, &config->i2c_pad[bus]);
  65 }
  66
  67 const struct soc_i2c_ctrlr_info *soc_get_i2c_ctrlr_info(size_t *num_ctrlrs)
  68 {
  69         *num_ctrlrs = ARRAY_SIZE(i2c_ctrlr);
  70         return i2c_ctrlr;
  71 }
  72
  73 const struct dw_i2c_bus_config *soc_get_i2c_bus_config(size_t *num_buses)
  74 {
  75         const struct soc_amd_glinda_config *config = config_of_soc();
  76
  77         *num_buses = ARRAY_SIZE(config->i2c);
  78         return config->i2c;
  79 }