src/soc/amd/mendocino/Makefile.mk

   1 # SPDX-License-Identifier: BSD-3-Clause
   2
   3 ifeq ($(CONFIG_SOC_AMD_MENDOCINO),y)
   4
   5 subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage
   6
   7 # Beware that all-y also adds the compilation unit to verstage on PSP
   8 all-y           += aoac.c
   9 all-y           += config.c
  10 all-y           += i2c.c
  11
  12 # all_x86-y adds the compilation unit to all stages that run on the x86 cores
  13 all_x86-y       += gpio.c
  14 all_x86-y       += uart.c
  15
  16 bootblock-y     += early_fch.c
  17 bootblock-y     += espi_util.c
  18
  19 verstage-y      += espi_util.c
  20
  21 romstage-y      += fsp_m_params.c
  22
  23 ramstage-y      += acpi.c
  24 ramstage-y      += chip.c
  25 ramstage-y      += cpu.c
  26 ramstage-y      += fch.c
  27 ramstage-y      += fsp_misc_data_hob.c
  28 ramstage-y      += fsp_s_params.c
  29 ramstage-y      += mca.c
  30 ramstage-y      += memmap.c
  31 ramstage-y      += root_complex.c
  32 ramstage-y      += xhci.c
  33 ramstage-y      += manifest.c
  34
  35 smm-y           += gpio.c
  36 smm-y           += root_complex.c
  37 smm-y           += smihandler.c
  38 smm-$(CONFIG_DEBUG_SMI) += uart.c
  39
  40 CPPFLAGS_common += -I$(src)/soc/amd/mendocino/include
  41 CPPFLAGS_common += -I$(src)/soc/amd/mendocino/acpi
  42 CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/mendocino
  43 CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
  44
  45 # Building the cbfs image will fail if the offset, aligned to 64 bytes, isn't large enough
  46 ifeq ($(CONFIG_CBFS_VERIFICATION),y)
  47 # 0x80 accounts for the cbfs_file struct + filename + metadata structs
  48 AMD_FW_AB_POSITION := 0x80
  49 else # ($(CONFIG_CBFS_VERIFICATION), y)
  50 # 0x40 accounts for the cbfs_file struct + filename + metadata structs without hash attribute
  51 AMD_FW_AB_POSITION := 0x40
  52 endif # ($(CONFIG_CBFS_VERIFICATION), y)
  53
  54 MENDOCINO_FW_A_POSITION=$(call int-add, \
  55         $(call get_fmap_value,FMAP_SECTION_FW_MAIN_A_START) $(AMD_FW_AB_POSITION))
  56
  57 MENDOCINO_FW_B_POSITION=$(call int-add, \
  58         $(call get_fmap_value,FMAP_SECTION_FW_MAIN_B_START) $(AMD_FW_AB_POSITION))
  59
  60 MENDOCINO_FW_BODY_OFFSET := 0x100
  61
  62 #
  63 # PSP Directory Table items
  64 #
  65 # Certain ordering requirements apply, however these are ensured by amdfwtool.
  66 # For more information see "AMD Platform Security Processor BIOS Architecture
  67 # Design Guide for AMD Family 17h Processors" (PID #55758, NDA only).
  68 #
  69
  70 ifeq ($(CONFIG_PSP_DISABLE_POSTCODES),y)
  71 PSP_SOFTFUSE_BITS += 7
  72 endif
  73
  74 ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y)
  75 # Enable secure debug unlock
  76 PSP_SOFTFUSE_BITS += 0
  77 OPT_TOKEN_UNLOCK="--token-unlock"
  78 endif
  79
  80 ifeq ($(CONFIG_PSP_LOAD_MP2_FW),y)
  81 OPT_PSP_LOAD_MP2_FW="--load-mp2-fw"
  82 else
  83 # Disable MP2 firmware loading
  84 PSP_SOFTFUSE_BITS += 29
  85 endif
  86
  87 # Use additional Soft Fuse bits specified in Kconfig
  88 PSP_SOFTFUSE_BITS += $(call strip_quotes, $(CONFIG_PSP_SOFTFUSE_BITS))
  89 PSP_RO_SOFTFUSE_BITS=$(PSP_SOFTFUSE_BITS)
  90
  91 # type = 0x04
  92 # The flashmap section used for this is expected to be named PSP_NVRAM
  93 PSP_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_START)
  94 PSP_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_SIZE)
  95
  96 # type = 0x3a
  97 ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y)
  98 PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE)
  99 endif
 100
 101 # type = 0x54
 102 # The flashmap section used for this is expected to be named PSP_RPMC_NVRAM
 103 PSP_RPMC_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_START)
 104 PSP_RPMC_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_SIZE)
 105
 106 # type = 0x55
 107 SPL_TABLE_FILE=$(CONFIG_SPL_TABLE_FILE)
 108 ifeq ($(CONFIG_HAVE_SPL_RW_AB_FILE),y)
 109 SPL_RW_AB_TABLE_FILE=$(CONFIG_SPL_RW_AB_TABLE_FILE)
 110 else
 111 SPL_RW_AB_TABLE_FILE=$(CONFIG_SPL_TABLE_FILE)
 112 endif
 113
 114 #
 115 # BIOS Directory Table items - proper ordering is managed by amdfwtool
 116 #
 117
 118 # type = 0x60
 119 PSP_APCB_FILES=$(APCB_SOURCES) $(APCB_SOURCES_RECOVERY)
 120
 121 # type = 0x61
 122 PSP_APOB_BASE=$(CONFIG_PSP_APOB_DRAM_ADDRESS)
 123
 124 # type = 0x62
 125 PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img
 126 PSP_ELF_FILE=$(objcbfs)/bootblock.elf
 127 PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}')
 128 PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}')
 129
 130 ifneq ($(CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE),y)
 131 # type = 0x63 - construct APOB NV base/size from flash map
 132 # The flashmap section used for this is expected to be named RW_MRC_CACHE
 133 APOB_NV_SIZE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_SIZE)
 134 APOB_NV_BASE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START)
 135
 136 ifeq ($(CONFIG_HAS_RECOVERY_MRC_CACHE)$(CONFIG_VBOOT),yy)
 137 # On boards with recovery MRC cache, point type 0x63 entry to RECOVERY_MRC_CACHE.
 138 # Else use RW_MRC_CACHE. This entry will be added in the RO section.
 139 APOB_NV_RO_SIZE=$(call get_fmap_value,FMAP_SECTION_RECOVERY_MRC_CACHE_SIZE)
 140 APOB_NV_RO_BASE=$(call get_fmap_value,FMAP_SECTION_RECOVERY_MRC_CACHE_START)
 141 else
 142 APOB_NV_RO_SIZE=$(APOB_NV_SIZE)
 143 APOB_NV_RO_BASE=$(APOB_NV_BASE)
 144 endif
 145 endif # !CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE
 146
 147 ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)
 148 # type = 0x6B - PSP Shared memory location
 149 ifneq ($(CONFIG_PSP_SHAREDMEM_SIZE),0x0)
 150 PSP_SHAREDMEM_SIZE=$(CONFIG_PSP_SHAREDMEM_SIZE)
 151 PSP_SHAREDMEM_BASE=$(shell awk '$$3 == "_psp_sharedmem_dram" {printf "0x" $$1}' $(objcbfs)/bootblock.map)
 152 endif
 153
 154 # type = 0x52 - PSP Bootloader Userspace Application (verstage)
 155 PSP_VERSTAGE_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_FILE))
 156 PSP_VERSTAGE_SIG_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_SIGNING_TOKEN))
 157 endif # CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK
 158
 159 ifeq ($(CONFIG_SEPARATE_SIGNED_PSPFW),y)
 160 SIGNED_AMDFW_A_POSITION=$(call int-subtract, \
 161         $(call get_fmap_value,FMAP_SECTION_SIGNED_AMDFW_A_START) \
 162         $(call get_fmap_value,FMAP_SECTION_FLASH_START))
 163 SIGNED_AMDFW_B_POSITION=$(call int-subtract, \
 164         $(call get_fmap_value,FMAP_SECTION_SIGNED_AMDFW_B_START) \
 165         $(call get_fmap_value,FMAP_SECTION_FLASH_START))
 166 SIGNED_AMDFW_A_FILE=$(obj)/amdfw_a.rom.body.signed
 167 SIGNED_AMDFW_B_FILE=$(obj)/amdfw_b.rom.body.signed
 168 endif # CONFIG_SEPARATE_SIGNED_PSPFW
 169
 170 # Helper function to return a value with given bit set
 171 # Soft Fuse type = 0xb - See #55758 (NDA) for bit definitions.
 172 set-bit=$(call int-shift-left, 1 $(call _toint,$1))
 173 PSP_SOFTFUSE=$(shell A=$(call int-add, \
 174                 $(foreach bit,$(sort $(PSP_SOFTFUSE_BITS)),$(call set-bit,$(bit)))); printf "0x%x" $$A)
 175 PSP_RO_SOFTFUSE=$(shell A=$(call int-add, \
 176                   $(foreach bit,$(sort $(PSP_RO_SOFTFUSE_BITS)),$(call set-bit,$(bit)))); printf "0x%x" $$A)
 177
 178 #
 179 # Build the arguments to amdfwtool (order is unimportant).  Missing file names
 180 # result in empty OPT_ variables, i.e. the argument is not passed to amdfwtool.
 181 #
 182
 183 add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
 184
 185 OPT_PSP_NVRAM_BASE=$(call add_opt_prefix, $(PSP_NVRAM_BASE), --nvram-base)
 186 OPT_PSP_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_NVRAM_SIZE), --nvram-size)
 187
 188 OPT_PSP_RPMC_NVRAM_BASE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_BASE), --rpmc-nvram-base)
 189 OPT_PSP_RPMC_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_SIZE), --rpmc-nvram-size)
 190
 191 OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage)
 192 OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig)
 193
 194 OPT_PSP_APCB_FILES= $(if $(APCB_SOURCES), --instance 0 --apcb $(APCB_SOURCES)) \
 195                     $(if $(APCB_SOURCES_RECOVERY), --instance 10 --apcb $(APCB_SOURCES_RECOVERY)) \
 196                     $(if $(APCB_SOURCES_68), --instance 18 --apcb $(APCB_SOURCES_68))
 197
 198 OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base)
 199 OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin)
 200 OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest)
 201 OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size)
 202
 203 OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem)
 204 OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size)
 205 OPT_APOB_NV_SIZE=$(call add_opt_prefix, $(APOB_NV_SIZE), --apob-nv-size)
 206 OPT_APOB_NV_BASE=$(call add_opt_prefix, $(APOB_NV_BASE),--apob-nv-base)
 207 OPT_APOB_NV_RO_SIZE=$(call add_opt_prefix, $(APOB_NV_RO_SIZE), --apob-nv-size)
 208 OPT_APOB_NV_RO_BASE=$(call add_opt_prefix, $(APOB_NV_RO_BASE),--apob-nv-base)
 209 OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode)
 210 OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed)
 211 OPT_EFS_SPI_MICRON_FLAG=$(call add_opt_prefix, $(CONFIG_EFS_SPI_MICRON_FLAG), --spi-micron-flag)
 212
 213 OPT_SIGNED_AMDFW_A_POSITION=$(call add_opt_prefix, $(SIGNED_AMDFW_A_POSITION), --signed-addr)
 214 OPT_SIGNED_AMDFW_A_FILE=$(call add_opt_prefix, $(SIGNED_AMDFW_A_FILE), --signed-output)
 215 OPT_SIGNED_AMDFW_B_POSITION=$(call add_opt_prefix, $(SIGNED_AMDFW_B_POSITION), --signed-addr)
 216 OPT_SIGNED_AMDFW_B_FILE=$(call add_opt_prefix, $(SIGNED_AMDFW_B_FILE), --signed-output)
 217
 218 OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse)
 219 OPT_PSP_RO_SOFTFUSE=$(call add_opt_prefix, $(PSP_RO_SOFTFUSE), --soft-fuse)
 220
 221 OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist)
 222 OPT_SPL_TABLE_FILE=$(call add_opt_prefix, $(SPL_TABLE_FILE), --spl-table)
 223 OPT_SPL_RW_AB_TABLE_FILE=$(call add_opt_prefix, $(SPL_RW_AB_TABLE_FILE), --spl-table)
 224
 225 # If vboot uses 2 RW slots, then 2 copies of PSP binaries are redundant
 226 OPT_RECOVERY_AB_SINGLE_COPY=$(if $(CONFIG_VBOOT_SLOTS_RW_AB), --recovery-ab-single-copy)
 227
 228 MANIFEST_FILE=$(obj)/amdfw_manifest
 229 OPT_MANIFEST=$(call add_opt_prefix, $(MANIFEST_FILE), --output-manifest)
 230
 231 AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \
 232                 $(OPT_PSP_NVRAM_BASE) \
 233                 $(OPT_PSP_NVRAM_SIZE) \
 234                 $(OPT_PSP_RPMC_NVRAM_BASE) \
 235                 $(OPT_PSP_RPMC_NVRAM_SIZE) \
 236                 $(OPT_APOB_ADDR) \
 237                 $(OPT_DEBUG_AMDFWTOOL) \
 238                 $(OPT_PSP_BIOSBIN_FILE) \
 239                 $(OPT_PSP_BIOSBIN_DEST) \
 240                 $(OPT_PSP_BIOSBIN_SIZE) \
 241                 --use-pspsecureos \
 242                 --load-s0i3 \
 243                 $(OPT_TOKEN_UNLOCK) \
 244                 $(OPT_WHITELIST_FILE) \
 245                 $(OPT_PSP_SHAREDMEM_BASE) \
 246                 $(OPT_PSP_SHAREDMEM_SIZE) \
 247                 $(OPT_EFS_SPI_READ_MODE) \
 248                 $(OPT_EFS_SPI_SPEED) \
 249                 $(OPT_EFS_SPI_MICRON_FLAG) \
 250                 --config $(CONFIG_AMDFW_CONFIG_FILE) \
 251                 --flashsize $(CONFIG_ROM_SIZE) \
 252                 $(OPT_RECOVERY_AB_SINGLE_COPY)
 253
 254 # If vBOOT is not enabled, we want the MP2 firmware in the common AMDFW
 255 ifeq ($(CONFIG_VBOOT),)
 256 AMDFW_COMMON_ARGS += $(OPT_PSP_LOAD_MP2_FW)
 257 OPT_PSP_LOAD_MP2_FW =
 258 else
 259 # Disable MP2 FW loading in VBOOT RO
 260 PSP_RO_SOFTFUSE_BITS += 29
 261 endif
 262
 263 $(obj)/amdfw.rom:       $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \
 264                         $(PSP_VERSTAGE_FILE) \
 265                         $(PSP_VERSTAGE_SIG_FILE) \
 266                         $$(PSP_APCB_FILES) \
 267                         $(DEP_FILES) \
 268                         $(AMDFWTOOL) \
 269                         $(obj)/fmap_config.h \
 270                         $(objcbfs)/bootblock.elf # this target also creates the .map file
 271         rm -f $@
 272         @printf "    AMDFWTOOL  $(subst $(obj)/,,$(@))\n"
 273         $(AMDFWTOOL) \
 274                 $(AMDFW_COMMON_ARGS) \
 275                 $(OPT_APOB_NV_RO_SIZE) \
 276                 $(OPT_APOB_NV_RO_BASE) \
 277                 $(OPT_VERSTAGE_FILE) \
 278                 $(OPT_VERSTAGE_SIG_FILE) \
 279                 $(OPT_SPL_TABLE_FILE) \
 280                 $(OPT_MANIFEST) \
 281                 $(OPT_PSP_RO_SOFTFUSE) \
 282                 --location $(CONFIG_AMD_FWM_POSITION) \
 283                 --output $@
 284
 285 ifeq ($(CONFIG_CBFS_VERIFICATION)$(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK),yy)
 286 $(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE)
 287         rm -f $@
 288         $(OBJCOPY_bootblock) -O binary $< $@
 289 else
 290 $(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
 291         rm -f $@
 292         @printf "    AMDCOMPRS  $(subst $(obj)/,,$(@))\n"
 293         $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \
 294                 --maxsize $(PSP_BIOSBIN_SIZE)
 295 endif
 296
 297 $(obj)/amdfw_a.rom: $(obj)/amdfw.rom
 298         rm -f $@
 299         @printf "    AMDFWTOOL  $(subst $(obj)/,,$(@))\n"
 300         $(AMDFWTOOL) \
 301                 $(AMDFW_COMMON_ARGS) \
 302                 $(OPT_APOB_NV_SIZE) \
 303                 $(OPT_APOB_NV_BASE) \
 304                 $(OPT_SPL_RW_AB_TABLE_FILE) \
 305                 $(OPT_SIGNED_AMDFW_A_POSITION) \
 306                 $(OPT_SIGNED_AMDFW_A_FILE) \
 307                 $(OPT_PSP_LOAD_MP2_FW) \
 308                 $(OPT_PSP_SOFTFUSE) \
 309                 --location $(call _tohex,$(MENDOCINO_FW_A_POSITION)) \
 310                 --body-location $(call _tohex,$$(($(MENDOCINO_FW_A_POSITION) + $(MENDOCINO_FW_BODY_OFFSET)))) \
 311                 --anywhere \
 312                 --output $@
 313
 314 $(obj)/amdfw_b.rom: $(obj)/amdfw.rom
 315         rm -f $@
 316         @printf "    AMDFWTOOL  $(subst $(obj)/,,$(@))\n"
 317         $(AMDFWTOOL) \
 318                 $(AMDFW_COMMON_ARGS) \
 319                 $(OPT_APOB_NV_SIZE) \
 320                 $(OPT_APOB_NV_BASE) \
 321                 $(OPT_SPL_RW_AB_TABLE_FILE) \
 322                 $(OPT_SIGNED_AMDFW_B_POSITION) \
 323                 $(OPT_SIGNED_AMDFW_B_FILE) \
 324                 $(OPT_PSP_LOAD_MP2_FW) \
 325                 $(OPT_PSP_SOFTFUSE) \
 326                 --location $(call _tohex,$(MENDOCINO_FW_B_POSITION)) \
 327                 --body-location $(call _tohex,$$(($(MENDOCINO_FW_B_POSITION) + $(MENDOCINO_FW_BODY_OFFSET)))) \
 328                 --anywhere \
 329                 --output $@
 330
 331 $(obj)/amdfw_a.rom.body: $(obj)/amdfw_a.rom
 332 $(obj)/amdfw_b.rom.body: $(obj)/amdfw_b.rom
 333
 334 $(MANIFEST_FILE): $(obj)/amdfw.rom
 335 cbfs-files-y += amdfw_manifest
 336 amdfw_manifest-file := $(MANIFEST_FILE)
 337 amdfw_manifest-type := raw
 338
 339 ifeq ($(CONFIG_VBOOT_SLOTS_RW_A)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy)
 340 cbfs-files-y += apu/amdfw_a
 341 apu/amdfw_a-file := $(obj)/amdfw_a.rom
 342 apu/amdfw_a-position := $(AMD_FW_AB_POSITION)
 343 apu/amdfw_a-type := raw
 344
 345 cbfs-files-y += apu/amdfw_a_body
 346 apu/amdfw_a_body-file := $(obj)/amdfw_a.rom.body
 347 apu/amdfw_a_body-position := $(call int-add, $(AMD_FW_AB_POSITION) $(MENDOCINO_FW_BODY_OFFSET))
 348 apu/amdfw_a_body-type := raw
 349 endif
 350
 351 ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy)
 352 cbfs-files-y += apu/amdfw_b
 353 apu/amdfw_b-file := $(obj)/amdfw_b.rom
 354 apu/amdfw_b-position := $(AMD_FW_AB_POSITION)
 355 apu/amdfw_b-type := raw
 356
 357 cbfs-files-y += apu/amdfw_b_body
 358 apu/amdfw_b_body-file := $(obj)/amdfw_b.rom.body
 359 apu/amdfw_b_body-position := $(call int-add, $(AMD_FW_AB_POSITION) $(MENDOCINO_FW_BODY_OFFSET))
 360 apu/amdfw_b_body-type := raw
 361 endif
 362
 363 ifeq ($(CONFIG_SEPARATE_SIGNED_PSPFW)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy)
 364 build_complete:: $(obj)/amdfw_a.rom.body $(obj)/amdfw_b.rom.body
 365         @printf "    Adding Signed ROM and HASH\n"
 366         $(CBFSTOOL) $(obj)/coreboot.rom write -u -r SIGNED_AMDFW_A -i 0 -f $(obj)/amdfw_a.rom.body.signed
 367         $(CBFSTOOL) $(obj)/coreboot.rom write -u -r SIGNED_AMDFW_B -i 0 -f $(obj)/amdfw_b.rom.body.signed
 368         $(CBFSTOOL) $(obj)/coreboot.rom add -r FW_MAIN_A -f $(obj)/amdfw_a.rom.body.signed.hash \
 369                 -n apu/amdfw_a_hash -t raw
 370         $(CBFSTOOL) $(obj)/coreboot.rom add -r FW_MAIN_B -f $(obj)/amdfw_b.rom.body.signed.hash \
 371                 -n apu/amdfw_b_hash -t raw
 372 endif
 373
 374 # Add ranges for all components up until the first segment of BIOS to be verified by GSC
 375 ifeq ($(CONFIG_VBOOT_GSCVD),y)
 376 # Adding range for Bootblock
 377 vboot-gscvd-ranges += $(call amdfwread-range-cmd,BIOSL2: 0x62)
 378 # Adding range for PSP Stage1 Bootloader
 379 vboot-gscvd-ranges += $(call amdfwread-range-cmd,PSPL2: 0x01)
 380
 381 ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)
 382 # Adding range for PSP Verstage
 383 vboot-gscvd-ranges += $(call amdfwread-range-cmd,PSPL2: 0x52)
 384 endif # ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)
 385 endif # ifeq ($(CONFIG_VBOOT_GSCVD),y)
 386
 387 endif # ($(CONFIG_SOC_AMD_MENDOCINO),y)