src/soc/amd/mendocino/fsp_s_params.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 /* TODO: Check if this is still correct */
   4
   5 #include <acpi/acpi.h>
   6 #include <amdblocks/apob_cache.h>
   7 #include <amdblocks/vbios_cache.h>
   8 #include <bootmode.h>
   9 #include <bootsplash.h>
  10 #include <console/console.h>
  11 #include <device/pci.h>
  12 #include <fsp/api.h>
  13 #include <program_loading.h>
  14
  15 static void fsp_assign_vbios_upds(FSP_S_CONFIG *scfg)
  16 {
  17         if (CONFIG(USE_SELECTIVE_GOP_INIT) && vbios_cache_is_valid() &&
  18                         !display_init_required()) {
  19                 scfg->vbios_buffer = 0;
  20                 printk(BIOS_SPEW, "%s: using VBIOS cache; skipping GOP driver.\n", __func__);
  21                 return;
  22         }
  23         printk(BIOS_SPEW, "%s: not using VBIOS cache; running GOP driver.\n", __func__);
  24         scfg->vbios_buffer = CONFIG(RUN_FSP_GOP) ? PCI_VGA_RAM_IMAGE_START : 0;
  25 }
  26
  27 void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
  28 {
  29         FSP_S_CONFIG *scfg = &supd->FspsConfig;
  30
  31         fsp_assign_vbios_upds(scfg);
  32
  33         /*
  34          * At this point FSP-S has been loaded into RAM. If we were to start loading the APOB
  35          * before FSP-S was loaded, we would introduce contention onto the SPI bus and
  36          * slow down the FSP-S read from SPI. Since FSP-S takes a while to execute and performs
  37          * no SPI operations, we can read the APOB while FSP-S executes.
  38          */
  39         start_apob_cache_read();
  40         /*
  41          * We enqueue the payload to be loaded after the APOB. This might cause a bit of
  42          * bus contention when loading uCode and OPROMs, but since those calls happen at
  43          * different points in the boot state machine it's a little harder to sequence all the
  44          * async loading correctly. So in order to keep the complexity down, we enqueue the
  45          * payload preload here. The end goal will be to add uCode and OPROM preloading
  46          * before the payload so that the sequencing is correct.
  47          *
  48          * While FSP-S is executing, it's not currently possible to enqueue other transactions
  49          * because FSP-S doesn't call `thread_yield()`. So the payload will start loading
  50          * right after FSP-S completes.
  51          */
  52         if (!acpi_is_wakeup_s3())
  53                 payload_preload();
  54 }
  55
  56 void soc_load_logo(FSPS_UPD *supd)
  57 {
  58         size_t logo_size;
  59         supd->FspsConfig.logo_bmp_buffer = (uint32_t)(uintptr_t)bmp_load_logo(&logo_size);
  60 }