src/soc/amd/stoneyridge/memmap.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <amdblocks/smm.h>
   4 #include <stdint.h>
   5 #include <cpu/x86/msr.h>
   6 #include <cpu/x86/smm.h>
   7 #include <cpu/amd/mtrr.h>
   8 #include <cbmem.h>
   9 #include <soc/northbridge.h>
  10 #include <soc/iomap.h>
  11 #include <amdblocks/biosram.h>
  12
  13 uintptr_t cbmem_top_chipset(void)
  14 {
  15         if (!get_top_of_mem_below_4gb())
  16                 return 0;
  17
  18         /* 8MB alignment to keep MTRR usage low */
  19         return ALIGN_DOWN(restore_top_of_low_cacheable() - CONFIG_SMM_TSEG_SIZE, 8 * MiB);
  20 }
  21
  22 static uintptr_t smm_region_start(void)
  23 {
  24         return cbmem_top();
  25 }
  26
  27 static size_t smm_region_size(void)
  28 {
  29         return CONFIG_SMM_TSEG_SIZE;
  30 }
  31
  32 void smm_region(uintptr_t *start, size_t *size)
  33 {
  34         static int once;
  35
  36         *start = smm_region_start();
  37         *size = smm_region_size();
  38
  39         if (!once) {
  40                 clear_tvalid();
  41                 once = 1;
  42         }
  43 }