mb/google/nissa/var/gothrax: Add probe and GPIO config for HDMI and
[coreboot2.git] / src / soc / cavium / common / Makefile.mk
blob6fa2c31fb1aeb3372830ea6f170f07fb3e83d544
1 ## SPDX-License-Identifier: GPL-2.0-only
3 ifeq ($(CONFIG_SOC_CAVIUM_COMMON),y)
5 subdirs-y += pci
7 # -Wstack-usage doesn't recognize hexadecimal numbers.
8 ifeq ($(CONFIG_COMPILER_GCC),y)
9 CFLAGS_arm64 += -Wstack-usage=$(shell printf "%d" $(CONFIG_STACK_SIZE))
10 endif
12 bootblock-$(CONFIG_BOOTBLOCK_CUSTOM) += bootblock.c
14 ################################################################################
15 # romstage
17 romstage-y += bdk-coreboot.c
18 romstage-y += ecam.c
20 ################################################################################
21 # ramstage
23 ramstage-y += bdk-coreboot.c
24 ramstage-y += ecam.c
26 CPPFLAGS_common += -Isrc/soc/cavium/common/include
28 ROM_HEADER_BIN := $(objgenerated)/rom_header.bin
29 ROM_HEADER_SOURCES += rom_clib_s_nbl1fw
30 ROM_HEADER_SOURCES += rom_csib_s_nbl1fw
32 ROM_HEADER_DEPS := $(foreach f, $(ROM_HEADER_SOURCES), src/soc/cavium/common/$(f).bin.hex)
34 # Include ROM header
35 $(ROM_HEADER_BIN): $(ROM_HEADER_DEPS)
36 for f in $+; \
37 do for c in $$(cat $$f | grep -v ^#); \
38 do printf $$(printf '\%o' 0x$$c); \
39 done; \
40 done > $@
42 $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(ROM_HEADER_BIN)
43 @printf " GEN $(subst $(obj)/,,$(@))\n"
44 dd if=/dev/zero ibs=1 count=$$(($(shell stat --printf="%s" $(objcbfs)/bootblock.raw.bin) + 0x10000)) of=$@ status=none
45 # Insert CLIB at 0x0 and CSIB at 0x100
46 dd if=$(ROM_HEADER_BIN) of=$@ bs=1 seek=0 conv=notrunc status=none
47 # Insert bootblock at 0x10000
48 dd if=$(objcbfs)/bootblock.raw.bin of=$@ bs=1 seek=$$((0x10000)) conv=notrunc status=none
50 endif