docs: Add 24.12 release notes
[coreboot2.git] / src / soc / ibm / power9 / cbmem.c
blob9543c4584809886c01b728caf8f609066b98398f
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <cbmem.h>
5 uintptr_t cbmem_top_chipset(void)
7 /*
8 * Smallest reported to be working (but not officially supported) DIMM is
9 * 4GB. This means that we always have at least as much available. Last
10 * 256MB are reserved for hostboot/coreboot (OCC and HOMER images).
12 * TODO: implement this properly after RAM is detected.
14 return 4ull * GiB - 256 * MiB;