src/soc/intel/apollolake/reset.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <cf9_reset.h>
   4 #include <console/console.h>
   5 #include <delay.h>
   6 #include <intelblocks/pmclib.h>
   7 #include <soc/heci.h>
   8 #include <soc/intel/common/reset.h>
   9 #include <soc/pm.h>
  10 #include <timer.h>
  11
  12 #define CSE_WAIT_MAX_MS                                                 1000
  13
  14 void do_global_reset(void)
  15 {
  16         pmc_global_reset_enable(1);
  17         do_full_reset();
  18 }
  19
  20 void cf9_reset_prepare(void)
  21 {
  22         struct stopwatch sw;
  23
  24         /*
  25          * If CSE state is something else than 'normal', it is probably in some
  26          * recovery state. In this case there is no point in  waiting for it to
  27          * get ready so we cross fingers and reset.
  28          */
  29         if (!heci_cse_normal()) {
  30                 printk(BIOS_DEBUG, "CSE is not in normal state, resetting\n");
  31                 return;
  32         }
  33
  34         /* Reset if CSE is ready */
  35         if (heci_cse_done())
  36                 return;
  37
  38         printk(BIOS_SPEW, "CSE is not yet ready, waiting\n");
  39         stopwatch_init_msecs_expire(&sw, CSE_WAIT_MAX_MS);
  40         while (!heci_cse_done()) {
  41                 if (stopwatch_expired(&sw)) {
  42                         printk(BIOS_SPEW, "CSE timed out. Resetting\n");
  43                         return;
  44                 }
  45                 mdelay(1);
  46         }
  47         printk(BIOS_SPEW, "CSE took %lld ms\n", stopwatch_duration_msecs(&sw));
  48 }