1 ## SPDX-License-Identifier: GPL-2.0-only
2 ifeq ($(CONFIG_SOC_INTEL_BRASWELL
),y
)
5 subdirs-y
+= ..
/..
/..
/cpu
/intel
/microcode
6 subdirs-y
+= ..
/..
/..
/cpu
/intel
/turbo
7 subdirs-y
+= ..
/..
/..
/cpu
/intel
/common
9 bootblock-y
+= gpio_support.c
10 bootblock-y
+= bootblock
/bootblock.c
11 bootblock-y
+= lpc_init.c
12 bootblock-y
+= pmutil.c
13 bootblock-y
+= tsc_freq.c
15 romstage-y
+= gpio_support.c
17 romstage-y
+= memmap.c
18 romstage-y
+= pmutil.c
20 romstage-y
+= tsc_freq.c
24 postcar-y
+= tsc_freq.c
29 ramstage-
$(CONFIG_ELOG
) += elog.c
36 ramstage-y
+= gpio_support.c
40 ramstage-y
+= memmap.c
41 ramstage-y
+= northcluster.c
43 ramstage-y
+= pmutil.c
44 ramstage-y
+= ramstage.c
49 ramstage-y
+= southcluster.c
50 ramstage-y
+= tsc_freq.c
53 # Remove as ramstage gets fleshed out
54 ramstage-y
+= placeholders.c
60 verstage-y
+= pmutil.c
61 verstage-y
+= tsc_freq.c
63 CPPFLAGS_common
+= -I
$(src
)/soc
/intel
/braswell
/
64 CPPFLAGS_common
+= -I
$(src
)/soc
/intel
/braswell
/include
65 CPPFLAGS_common
+= -I
$(call strip_quotes
,$(CONFIG_FSP_HEADER_PATH
))
67 cpu_microcode_bins
+= $(wildcard 3rdparty
/intel-microcode
/intel-ucode
/06-4c-
*)
69 ifneq ($(CONFIG_VGA_BIOS_FILE
),)
70 #we will assume that the vbios names will remain as they are now: vgabios.bin and vgabios_c0.bin
71 BRASWELL_C0_VBIOS
= $(subst .bin
,_c0.bin
,$(call strip_quotes
,$(CONFIG_VGA_BIOS_FILE
)))
73 cbfs-files-
$(CONFIG_VGA_BIOS
) += pci8086
,22b1.rom
74 pci8086
,22b1.rom-file
:= $(BRASWELL_C0_VBIOS
)
75 pci8086
,22b1.rom-type
:= optionrom
76 endif # ifneq ($(CONFIG_VGA_BIOS_FILE),)
78 endif # ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)