mb/google/nissa/var/telith: Disable stylus function
[coreboot2.git] / src / soc / intel / braswell / Makefile.mk
blob923ba9d85c4c95fb54628249e37b355f4da04c5a
1 ## SPDX-License-Identifier: GPL-2.0-only
2 ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)
4 subdirs-y += romstage
5 subdirs-y += ../../../cpu/intel/microcode
6 subdirs-y += ../../../cpu/intel/turbo
7 subdirs-y += ../../../cpu/intel/common
9 bootblock-y += gpio_support.c
10 bootblock-y += bootblock/bootblock.c
11 bootblock-y += lpc_init.c
12 bootblock-y += pmutil.c
13 bootblock-y += tsc_freq.c
15 romstage-y += gpio_support.c
16 romstage-y += iosf.c
17 romstage-y += memmap.c
18 romstage-y += pmutil.c
19 romstage-y += smbus.c
20 romstage-y += tsc_freq.c
22 postcar-y += memmap.c
23 postcar-y += iosf.c
24 postcar-y += tsc_freq.c
26 ramstage-y += acpi.c
27 ramstage-y += chip.c
28 ramstage-y += cpu.c
29 ramstage-$(CONFIG_ELOG) += elog.c
30 ramstage-y += emmc.c
31 ramstage-y += fadt.c
32 ramstage-y += gpio.c
33 ramstage-y += gfx.c
34 ramstage-y += smbus.c
36 ramstage-y += gpio_support.c
37 ramstage-y += iosf.c
38 ramstage-y += lpe.c
39 ramstage-y += lpss.c
40 ramstage-y += memmap.c
41 ramstage-y += northcluster.c
42 ramstage-y += pcie.c
43 ramstage-y += pmutil.c
44 ramstage-y += ramstage.c
45 ramstage-y += sata.c
46 ramstage-y += scc.c
47 ramstage-y += sd.c
48 ramstage-y += smm.c
49 ramstage-y += southcluster.c
50 ramstage-y += tsc_freq.c
51 ramstage-y += xhci.c
53 # Remove as ramstage gets fleshed out
54 ramstage-y += placeholders.c
55 smm-y += lpc_init.c
56 smm-y += pmutil.c
57 smm-y += smihandler.c
58 smm-y += tsc_freq.c
60 verstage-y += pmutil.c
61 verstage-y += tsc_freq.c
63 CPPFLAGS_common += -I$(src)/soc/intel/braswell/
64 CPPFLAGS_common += -I$(src)/soc/intel/braswell/include
65 CPPFLAGS_common += -I$(call strip_quotes,$(CONFIG_FSP_HEADER_PATH))
67 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-4c-*)
69 ifneq ($(CONFIG_VGA_BIOS_FILE),)
70 #we will assume that the vbios names will remain as they are now: vgabios.bin and vgabios_c0.bin
71 BRASWELL_C0_VBIOS= $(subst .bin,_c0.bin,$(call strip_quotes,$(CONFIG_VGA_BIOS_FILE)))
73 cbfs-files-$(CONFIG_VGA_BIOS) += pci8086,22b1.rom
74 pci8086,22b1.rom-file := $(BRASWELL_C0_VBIOS)
75 pci8086,22b1.rom-type := optionrom
76 endif # ifneq ($(CONFIG_VGA_BIOS_FILE),)
78 endif # ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)