mb/prodrive/atlas: Remove the workaround for CLKREQ pins
[coreboot2.git] / src / soc / intel / braswell / acpi / dptf / cpu.asl
blob728d09478d1af6aa7aae8640bfac35d440c39396
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #ifndef DPTF_CPU_PASSIVE
4 #define DPTF_CPU_PASSIVE        80
5 #endif
7 #ifndef DPTF_CPU_CRITICAL
8 #define DPTF_CPU_CRITICAL       90
9 #endif
11 #ifndef DPTF_CPU_ACTIVE_AC0
12 #define DPTF_CPU_ACTIVE_AC0     90
13 #endif
15 #ifndef DPTF_CPU_ACTIVE_AC1
16 #define DPTF_CPU_ACTIVE_AC1     80
17 #endif
19 #ifndef DPTF_CPU_ACTIVE_AC2
20 #define DPTF_CPU_ACTIVE_AC2     70
21 #endif
23 #ifndef DPTF_CPU_ACTIVE_AC3
24 #define DPTF_CPU_ACTIVE_AC3     60
25 #endif
27 #ifndef DPTF_CPU_ACTIVE_AC4
28 #define DPTF_CPU_ACTIVE_AC4     50
29 #endif
31 External (\_SB.CP00._TSS, MethodObj)
32 External (\_SB.CP00._TPC, MethodObj)
33 External (\_SB.CP00._PTC, PkgObj)
34 External (\_SB.CP00._TSD, PkgObj)
35 External (\_SB.CP00._PSS, MethodObj)
37 Device (B0DB)
39         Name (_ADR, 0x000B0000)  /* Bus 0, Device B, Function 0 */
41         Method (_STA)
42         {
43                 If (\DPTE == 1) {
44                         Return (0xF)
45                 } Else {
46                         Return (0x0)
47                 }
48         }
50         /*
51          * Processor Throttling Controls
52          */
54         Method (_TSS)
55         {
56                 If (CondRefOf (\_SB.CP00._TSS)) {
57                         Return (\_SB.CP00._TSS)
58                 } Else {
59                         Return (Package ()
60                         {
61                                 Package () { 0, 0, 0, 0, 0 }
62                         })
63                 }
64         }
66         Method (_TPC)
67         {
68                 If (CondRefOf (\_SB.CP00._TPC)) {
69                         Return (\_SB.CP00._TPC)
70                 } Else {
71                         Return (0)
72                 }
73         }
75         Method (_PTC)
76         {
77                 If (CondRefOf (\_SB.CP00._PTC)) {
78                         Return (\_SB.CP00._PTC)
79                 } Else {
80                         Return (Package ()
81                         {
82                                 Buffer () { 0 },
83                                 Buffer () { 0 }
84                         })
85                 }
86         }
88         Method (_TSD)
89         {
90                 If (CondRefOf (\_SB.CP00._TSD)) {
91                         Return (\_SB.CP00._TSD)
92                 } Else {
93                         Return (Package ()
94                         {
95                                 Package () { 5, 0, 0, 0, 0 }
96                         })
97                 }
98         }
100         Method (_TDL)
101         {
102                 If (CondRefOf (\_SB.CP00._TSS)) {
103                         Local0 = SizeOf (\_SB.CP00._TSS ())
104                         Local0--
105                         Return (Local0)
106                 } Else {
107                         Return (0)
108                 }
109         }
111         /*
112          * Processor Performance Control
113          */
115         Method (_PPC)
116         {
117                 Return (0)
118         }
120         Method (SPPC, 1)
121         {
122                 \PPCM = Arg0
124                 /* Notify OS to re-read _PPC limit on each CPU */
125                 \PPCN ()
126         }
128         Method (_PSS)
129         {
130                 If (CondRefOf (\_SB.CP00._PSS)) {
131                         Return (\_SB.CP00._PSS)
132                 } Else {
133                         Return (Package ()
134                         {
135                                 Package () { 0, 0, 0, 0, 0, 0 }
136                         })
137                 }
138         }
140         Method (_PDL)
141         {
142                 /* Check for mainboard specific _PDL override */
143                 If (CondRefOf (\_SB.MPDL)) {
144                         Return (\_SB.MPDL)
145                 } ElseIf (CondRefOf (\_SB.CP00._PSS)) {
146                         Local0 = SizeOf (\_SB.CP00._PSS ())
147                         Local0--
148                         Return (Local0)
149                 } Else {
150                         Return (0)
151                 }
152         }
154         /* Return PPCC table defined by mainboard */
155         Method (PPCC)
156         {
157                 Return (\_SB.MPPC)
158         }
160         Method (_CRT)
161         {
162                 Return (\_SB.DPTF.CTOK(DPTF_CPU_CRITICAL))
163         }
165         Method (_PSV)
166         {
167                 Return (\_SB.DPTF.CTOK(DPTF_CPU_PASSIVE))
168         }
170         Method (_AC0)
171         {
172                 Return (\_SB.DPTF.CTOK(DPTF_CPU_ACTIVE_AC0))
173         }
175         Method (_AC1)
176         {
177                 Return (\_SB.DPTF.CTOK(DPTF_CPU_ACTIVE_AC1))
178         }
180         Method (_AC2)
181         {
182                 Return (\_SB.DPTF.CTOK(DPTF_CPU_ACTIVE_AC2))
183         }
185         Method (_AC3)
186         {
187                 Return (\_SB.DPTF.CTOK(DPTF_CPU_ACTIVE_AC3))
188         }
190         Method (_AC4)
191         {
192                 Return (\_SB.DPTF.CTOK(DPTF_CPU_ACTIVE_AC4))
193         }