mb/google/nissa/var/rull: eMMC DLL tuning
[coreboot2.git] / src / soc / intel / braswell / scc.c
blob8894aa5c758b039abecb930ba8bb5b294c90bf81
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <acpi/acpi_gnvs.h>
4 #include <device/device.h>
5 #include <device/pci.h>
6 #include <soc/iosf.h>
7 #include <soc/device_nvs.h>
8 #include <soc/ramstage.h>
10 void scc_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index)
12 struct resource *bar;
13 struct device_nvs *dev_nvs = acpi_get_device_nvs();
15 /* Save BAR0 and BAR1 to ACPI NVS */
16 bar = probe_resource(dev, PCI_BASE_ADDRESS_0);
17 if (bar)
18 dev_nvs->scc_bar0[nvs_index] = bar->base;
19 bar = probe_resource(dev, PCI_BASE_ADDRESS_2);
20 if (bar)
21 dev_nvs->scc_bar1[nvs_index] = bar->base;
23 /* Device is enabled in ACPI mode */
24 dev_nvs->scc_en[nvs_index] = 1;