src/soc/intel/broadwell/report_platform.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <console/console.h>
   4 #include <cpu/cpu.h>
   5 #include <cpu/intel/haswell/haswell.h>
   6 #include <cpu/intel/microcode.h>
   7 #include <cpu/x86/msr.h>
   8 #include <device/pci.h>
   9 #include <device/pci_ops.h>
  10 #include <soc/pch.h>
  11 #include <soc/pci_devs.h>
  12 #include <soc/romstage.h>
  13 #include <soc/systemagent.h>
  14 #include <string.h>
  15
  16 /* FIXME: Needs an update */
  17 static struct {
  18         u32 cpuid;
  19         const char *name;
  20 } cpu_table[] = {
  21         { CPUID_HASWELL_A0,       "Haswell A0" },
  22         { CPUID_HASWELL_B0,       "Haswell B0" },
  23         { CPUID_HASWELL_C0,       "Haswell C0" },
  24         { CPUID_HASWELL_ULT_B0,   "Haswell ULT B0" },
  25         { CPUID_HASWELL_ULT_C0,   "Haswell ULT C0 or D0" },
  26         { CPUID_CRYSTALWELL_C0,   "Haswell Perf Halo" },
  27         { CPUID_BROADWELL_ULT_C0, "Broadwell C0" },
  28         { CPUID_BROADWELL_ULT_D0, "Broadwell D0" },
  29         { CPUID_BROADWELL_ULT_E0, "Broadwell E0 or F0" },
  30 };
  31
  32 static struct {
  33         u8 revid;
  34         const char *name;
  35 } mch_rev_table[] = {
  36         { MCH_BROADWELL_REV_D0, "Broadwell D0" },
  37         { MCH_BROADWELL_REV_E0, "Broadwell E0" },
  38         { MCH_BROADWELL_REV_F0, "Broadwell F0" },
  39 };
  40
  41 static struct {
  42         u16 lpcid;
  43         const char *name;
  44 } pch_table[] = {
  45         { PCH_LPT_LP_SAMPLE,     "LynxPoint LP Sample" },
  46         { PCH_LPT_LP_PREMIUM,    "LynxPoint LP Premium" },
  47         { PCH_LPT_LP_MAINSTREAM, "LynxPoint LP Mainstream" },
  48         { PCH_LPT_LP_VALUE,      "LynxPoint LP Value" },
  49         { PCH_WPT_HSW_U_SAMPLE,  "Haswell U Sample" },
  50         { PCH_WPT_BDW_U_SAMPLE,  "Broadwell U Sample" },
  51         { PCH_WPT_BDW_U_PREMIUM, "Broadwell U Premium" },
  52         { PCH_WPT_BDW_U_BASE,    "Broadwell U Base" },
  53         { PCH_WPT_BDW_Y_SAMPLE,  "Broadwell Y Sample" },
  54         { PCH_WPT_BDW_Y_PREMIUM, "Broadwell Y Premium" },
  55         { PCH_WPT_BDW_Y_BASE,    "Broadwell Y Base" },
  56         { PCH_WPT_BDW_H,         "Broadwell H" },
  57 };
  58
  59 static struct {
  60         u16 igdid;
  61         const char *name;
  62 } igd_table[] = {
  63         { IGD_HASWELL_ULT_GT1,     "Haswell ULT GT1" },
  64         { IGD_HASWELL_ULT_GT2,     "Haswell ULT GT2" },
  65         { IGD_HASWELL_ULT_GT3,     "Haswell ULT GT3" },
  66         { IGD_BROADWELL_U_GT1,     "Broadwell U GT1" },
  67         { IGD_BROADWELL_U_GT2,     "Broadwell U GT2" },
  68         { IGD_BROADWELL_U_GT3_15W, "Broadwell U GT3 (15W)" },
  69         { IGD_BROADWELL_U_GT3_28W, "Broadwell U GT3 (28W)" },
  70         { IGD_BROADWELL_Y_GT2,     "Broadwell Y GT2" },
  71         { IGD_BROADWELL_H_GT2,     "Broadwell U GT2" },
  72         { IGD_BROADWELL_H_GT3,     "Broadwell U GT3" },
  73 };
  74
  75 static void report_cpu_info(void)
  76 {
  77         struct cpuid_result cpuidr;
  78         u32 i, index, cpu_id, cpu_feature_flag;
  79         char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */
  80         int vt, txt, aes;
  81         const char *mode[] = {"NOT ", ""};
  82         const char *cpu_type = "Unknown";
  83
  84         index = 0x80000000;
  85         cpuidr = cpuid(index);
  86         if (cpuidr.eax < 0x80000004) {
  87                 strcpy(cpu_string, "Platform info not available");
  88         } else {
  89                 u32 *p = (u32 *)cpu_string;
  90                 for (i = 2; i <= 4 ; i++) {
  91                         cpuidr = cpuid(index + i);
  92                         *p++ = cpuidr.eax;
  93                         *p++ = cpuidr.ebx;
  94                         *p++ = cpuidr.ecx;
  95                         *p++ = cpuidr.edx;
  96                 }
  97         }
  98         /* Skip leading spaces in CPU name string */
  99         while (cpu_name[0] == ' ')
 100                 cpu_name++;
 101
 102         cpu_id = cpu_get_cpuid();
 103
 104         /* Look for string to match the name */
 105         for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {
 106                 if (cpu_table[i].cpuid == cpu_id) {
 107                         cpu_type = cpu_table[i].name;
 108                         break;
 109                 }
 110         }
 111
 112         printk(BIOS_DEBUG, "CPU: %s\n", cpu_name);
 113         printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n",
 114                cpu_id, cpu_type, get_current_microcode_rev());
 115
 116         cpu_feature_flag = cpu_get_feature_flags_ecx();
 117         aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0;
 118         txt = (cpu_feature_flag & CPUID_SMX) ? 1 : 0;
 119         vt = (cpu_feature_flag & CPUID_VMX) ? 1 : 0;
 120         printk(BIOS_DEBUG, "CPU: AES %ssupported, TXT %ssupported, "
 121                "VT %ssupported\n", mode[aes], mode[txt], mode[vt]);
 122 }
 123
 124 static void report_mch_info(void)
 125 {
 126         int i;
 127         u16 mch_device = pci_read_config16(HOST_BRIDGE, PCI_DEVICE_ID);
 128         u8 mch_revision = pci_read_config8(HOST_BRIDGE, PCI_REVISION_ID);
 129         const char *mch_type = "Unknown";
 130
 131         /* Look for string to match the revision for Broadwell U/Y */
 132         if (mch_device == MCH_BROADWELL_ID_U_Y) {
 133                 for (i = 0; i < ARRAY_SIZE(mch_rev_table); i++) {
 134                         if (mch_rev_table[i].revid == mch_revision) {
 135                                 mch_type = mch_rev_table[i].name;
 136                                 break;
 137                         }
 138                 }
 139         }
 140
 141         printk(BIOS_DEBUG, "MCH: device id %04x (rev %02x) is %s\n",
 142                mch_device, mch_revision, mch_type);
 143 }
 144
 145 static void report_pch_info(void)
 146 {
 147         int i;
 148         u16 lpcid = pch_type();
 149         const char *pch_type = "Unknown";
 150
 151         for (i = 0; i < ARRAY_SIZE(pch_table); i++) {
 152                 if (pch_table[i].lpcid == lpcid) {
 153                         pch_type = pch_table[i].name;
 154                         break;
 155                 }
 156         }
 157         printk(BIOS_DEBUG, "PCH: device id %04x (rev %02x) is %s\n",
 158                lpcid, pch_revision(), pch_type);
 159 }
 160
 161 static void report_igd_info(void)
 162 {
 163         int i;
 164         u16 igdid = pci_read_config16(SA_DEV_IGD, PCI_DEVICE_ID);
 165         const char *igd_type = "Unknown";
 166
 167         for (i = 0; i < ARRAY_SIZE(igd_table); i++) {
 168                 if (igd_table[i].igdid == igdid) {
 169                         igd_type = igd_table[i].name;
 170                         break;
 171                 }
 172         }
 173         printk(BIOS_DEBUG, "IGD: device id %04x (rev %02x) is %s\n",
 174                igdid, pci_read_config8(SA_DEV_IGD, PCI_REVISION_ID), igd_type);
 175 }
 176
 177 void report_platform_info(void)
 178 {
 179         report_cpu_info();
 180         report_mch_info();
 181         report_pch_info();
 182         report_igd_info();
 183 }