soc/mediatek: Correct value's data type to u8 in dptx
[coreboot2.git] / src / soc / intel / elkhartlake / bootblock / bootblock.c
blobcc0bb8f0c4a087e57b5bfc9fadfeae45c3b1c2d3
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <bootblock_common.h>
4 #include <console/console.h>
5 #include <intelblocks/fast_spi.h>
6 #include <intelblocks/systemagent.h>
7 #include <intelblocks/tco.h>
8 #include <intelblocks/uart.h>
9 #include <intelpch/smbus.h>
10 #include <soc/bootblock.h>
12 asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
14 /* Call lib/bootblock.c main */
15 bootblock_main_with_basetime(base_timestamp);
18 void bootblock_soc_early_init(void)
20 bootblock_systemagent_early_init();
21 bootblock_pch_early_init();
22 fast_spi_cache_bios_region();
23 pch_early_iorange_init();
24 if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE))
25 uart_bootblock_init();
28 void bootblock_soc_init(void)
30 report_platform_info();
31 bootblock_pch_init();
33 /* Programming TCO_BASE_ADDRESS and TCO Timer Halt */
34 tco_configure();
35 if (CONFIG(SOC_INTEL_ELKHARTLAKE_TCO_NO_REBOOT_EN)) {
36 uint16_t reg = tco_read_reg(TCO1_CNT);
37 /* NO_REBOOT is enabled via bit 0 in TCO1_CNT. */
38 reg |= 0x01;
39 tco_write_reg(TCO1_CNT, reg);
40 printk(BIOS_DEBUG, "TCO: Disable reset on second expiration.\n");