src/soc/intel/xeon_sp/ibl/soc_gpio.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <gpio.h>
   4 #include <intelblocks/pcr.h>
   5 #include <soc/pcr_ids.h>
   6 #include <soc/pm.h>
   7
   8 /*
   9  * Reset mapping
  10  * 00 = RSMRST#
  11  * 01 = Host Deep Reset
  12  * 10 = PLTRST#
  13  * 11 = Reserved
  14  */
  15 static const struct reset_mapping rst_map[] = {
  16         { .logical = PAD_CFG0_LOGICAL_RESET_RSMRST, .chipset = 0U << 30 },
  17         { .logical = PAD_CFG0_LOGICAL_RESET_DEEP,   .chipset = 1U << 30 },
  18         { .logical = PAD_CFG0_LOGICAL_RESET_PLTRST, .chipset = 2U << 30 },
  19 };
  20
  21 static const struct pad_group emmitsburg_community0_groups[] = {
  22         INTEL_GPP(GPPC_A0, GPPC_A0, ESPI_CLK_LOOPBK),   /* GPPC A */
  23         INTEL_GPP(GPPC_A0, GPPC_B0, GPPC_B23),          /* GPPC B */
  24         INTEL_GPP(GPPC_A0, GPPC_S0, SPI_CLK_LOOPBK),    /* GPPC S */
  25 };
  26
  27 static const struct pad_group emmitsburg_community1_groups[] = {
  28         INTEL_GPP(GPPC_C0, GPPC_C0, GPPC_C21),          /* GPPC C */
  29         INTEL_GPP(GPPC_C0, GPP_D0, GPP_D23),            /* GPP D */
  30 };
  31
  32 static const struct pad_group emmitsburg_community3_groups[] = {
  33         INTEL_GPP(GPP_E0, GPP_E0, GPP_E23),             /* GPP E */
  34 };
  35
  36 static const struct pad_group emmitsburg_community4_groups[] = {
  37         INTEL_GPP(GPPC_H0, GPPC_H0, GPPC_H19),          /* GPPC H */
  38         INTEL_GPP(GPPC_H0, GPP_J0, GPP_J17),            /* GPP J */
  39 };
  40
  41 static const struct pad_group emmitsburg_community5_groups[] = {
  42         INTEL_GPP(GPP_I0, GPP_I0, GPP_I23),             /* GPP I */
  43         INTEL_GPP(GPP_I0, GPP_L0, GPP_L17),             /* GPP L */
  44         INTEL_GPP(GPP_I0, GPP_M0, GPP_M17),             /* GPP M */
  45         INTEL_GPP(GPP_I0, GPP_N0, GPP_N17),             /* GPP N */
  46 };
  47
  48 static const struct pad_group emmitsburg_community2_groups[] = {
  49         INTEL_GPP(GPP_O0, GPP_O0, GPP_O16),       /* GPP O */
  50 };
  51
  52 static const struct pad_community emmitsburg_gpio_communities[] = {
  53         [COMM_0] = { /* GPIO Community 0: GPPC A, B, S */
  54                 .port               = PID_GPIOCOM0,
  55                 .first_pad          = GPPC_A0,
  56                 .last_pad           = SPI_CLK_LOOPBK,
  57                 .num_gpi_regs       = NUM_GPIO_COM0_GPI_REGS,
  58                 .pad_cfg_base       = PAD_CFG_BASE,
  59                 .host_own_reg_0     = HOSTSW_OWN_REG_0,
  60                 .gpi_int_sts_reg_0  = GPI_INT_STS_0,
  61                 .gpi_int_en_reg_0   = GPI_INT_EN_0,
  62                 .gpi_smi_sts_reg_0  = GPI_SMI_STS_0,
  63                 .gpi_smi_en_reg_0   = GPI_SMI_EN_0,
  64                 .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
  65                 .name               = "GPIO_COM0",
  66                 .acpi_path          = "\\_SB.PCI0.GPIO",
  67                 .reset_map          = rst_map,
  68                 .num_reset_vals     = ARRAY_SIZE(rst_map),
  69                 .groups             = emmitsburg_community0_groups,
  70                 .num_groups         = ARRAY_SIZE(emmitsburg_community0_groups),
  71         },
  72         [COMM_1] = { /* GPIO Community 1: GPPC C, GPP D */
  73                 .port               = PID_GPIOCOM1,
  74                 .first_pad          = GPPC_C0,
  75                 .last_pad           = GPP_D23,
  76                 .num_gpi_regs       = NUM_GPIO_COM1_GPI_REGS,
  77                 .pad_cfg_base       = PAD_CFG_BASE,
  78                 .host_own_reg_0     = HOSTSW_OWN_REG_0,
  79                 .gpi_int_sts_reg_0  = GPI_INT_STS_0,
  80                 .gpi_int_en_reg_0   = GPI_INT_EN_0,
  81                 .gpi_smi_sts_reg_0  = GPI_SMI_STS_0,
  82                 .gpi_smi_en_reg_0   = GPI_SMI_EN_0,
  83                 .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
  84                 .name               = "GPIO_COM1",
  85                 .acpi_path          = "\\_SB.PCI0.GPIO",
  86                 .reset_map          = rst_map,
  87                 .num_reset_vals     = ARRAY_SIZE(rst_map),
  88                 .groups             = emmitsburg_community1_groups,
  89                 .num_groups         = ARRAY_SIZE(emmitsburg_community1_groups),
  90         },
  91         [COMM_3] = { /* GPIO Community 3: GPP E */
  92                 .port               = PID_GPIOCOM3,
  93                 .first_pad          = GPP_E0,
  94                 .last_pad           = GPP_E23,
  95                 .num_gpi_regs       = NUM_GPIO_COM3_GPI_REGS,
  96                 .pad_cfg_base       = PAD_CFG_BASE,
  97                 .host_own_reg_0     = HOSTSW_OWN_REG_0,
  98                 .gpi_int_sts_reg_0  = GPI_INT_STS_0,
  99                 .gpi_int_en_reg_0   = GPI_INT_EN_0,
 100                 .gpi_smi_sts_reg_0  = GPI_SMI_STS_0,
 101                 .gpi_smi_en_reg_0   = GPI_SMI_EN_0,
 102                 .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
 103                 .name               = "GPIO_COM3",
 104                 .acpi_path          = "\\_SB.PCI0.GPIO",
 105                 .reset_map          = rst_map,
 106                 .num_reset_vals     = ARRAY_SIZE(rst_map),
 107                 .groups             = emmitsburg_community3_groups,
 108                 .num_groups         = ARRAY_SIZE(emmitsburg_community3_groups),
 109         },
 110         [COMM_4] = { /* GPIO Community 4: GPPC H, J */
 111                 .port               = PID_GPIOCOM4,
 112                 .first_pad          = GPPC_H0,
 113                 .last_pad           = GPP_J17,
 114                 .num_gpi_regs       = NUM_GPIO_COM4_GPI_REGS,
 115                 .pad_cfg_base       = PAD_CFG_BASE,
 116                 .host_own_reg_0     = HOSTSW_OWN_REG_0,
 117                 .gpi_int_sts_reg_0  = GPI_INT_STS_0,
 118                 .gpi_int_en_reg_0   = GPI_INT_EN_0,
 119                 .gpi_smi_sts_reg_0  = GPI_SMI_STS_0,
 120                 .gpi_smi_en_reg_0   = GPI_SMI_EN_0,
 121                 .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
 122                 .name               = "GPIO_COM4",
 123                 .acpi_path          = "\\_SB.PCI0.GPIO",
 124                 .reset_map          = rst_map,
 125                 .num_reset_vals     = ARRAY_SIZE(rst_map),
 126                 .groups             = emmitsburg_community4_groups,
 127                 .num_groups         = ARRAY_SIZE(emmitsburg_community4_groups),
 128         },
 129         [COMM_5] = { /* GPIO Community 5: GPP I, L, M, N */
 130                 .port               = PID_GPIOCOM5,
 131                 .first_pad          = GPP_I0,
 132                 .last_pad           = GPP_N17,
 133                 .num_gpi_regs       = NUM_GPIO_COM5_GPI_REGS,
 134                 .pad_cfg_base       = PAD_CFG_BASE,
 135                 .host_own_reg_0     = HOSTSW_OWN_REG_0,
 136                 .gpi_int_sts_reg_0  = GPI_INT_STS_0,
 137                 .gpi_int_en_reg_0   = GPI_INT_EN_0,
 138                 .gpi_smi_sts_reg_0  = GPI_SMI_STS_0,
 139                 .gpi_smi_en_reg_0   = GPI_SMI_EN_0,
 140                 .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
 141                 .name               = "GPIO_COM5",
 142                 .acpi_path          = "\\_SB.PCI0.GPIO",
 143                 .reset_map          = rst_map,
 144                 .num_reset_vals     = ARRAY_SIZE(rst_map),
 145                 .groups             = emmitsburg_community5_groups,
 146                 .num_groups         = ARRAY_SIZE(emmitsburg_community5_groups),
 147         },
 148         [COMM_2] = { /* GPIO Community 2: GPP O */
 149                 .port               = PID_GPIOCOM2,
 150                 .first_pad          = GPP_O0,
 151                 .last_pad           = GPP_O16,
 152                 .num_gpi_regs       = NUM_GPIO_COM2_GPI_REGS,
 153                 .pad_cfg_base       = PAD_CFG_BASE,
 154                 .host_own_reg_0     = HOSTSW_OWN_REG_0,
 155                 .gpi_int_sts_reg_0  = GPI_INT_STS_0,
 156                 .gpi_int_en_reg_0   = GPI_INT_EN_0,
 157                 .gpi_smi_sts_reg_0  = GPI_SMI_STS_0,
 158                 .gpi_smi_en_reg_0   = GPI_SMI_EN_0,
 159                 .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP,
 160                 .name               = "GPIO_COM2",
 161                 .acpi_path          = "\\_SB.PCI0.GPIO",
 162                 .reset_map          = rst_map,
 163                 .num_reset_vals     = ARRAY_SIZE(rst_map),
 164                 .groups             = emmitsburg_community2_groups,
 165                 .num_groups         = ARRAY_SIZE(emmitsburg_community2_groups),
 166         },
 167 };
 168
 169 const struct pad_community *soc_gpio_get_community(size_t *num_communities)
 170 {
 171         *num_communities = ARRAY_SIZE(emmitsburg_gpio_communities);
 172         return emmitsburg_gpio_communities;
 173 }
 174
 175 const struct pmc_to_gpio_route *soc_pmc_gpio_routes(size_t *num)
 176 {
 177         static const struct pmc_to_gpio_route routes[] = {
 178                 { GPPC_A, GPPC_A },
 179                 { GPPC_B, GPPC_B },
 180                 { GPPC_S, GPPC_S },
 181                 { GPPC_C, GPPC_C },
 182                 { GPP_D, GPP_D },
 183                 { GPP_E, GPP_E },
 184                 { GPPC_H, GPPC_H },
 185                 { GPPC_J, GPPC_J },
 186         };
 187
 188         *num = ARRAY_SIZE(routes);
 189         return routes;
 190 }