src/soc/intel/xeon_sp/pcu0.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <device/pci.h>
   4 #include <device/pci_ids.h>
   5 #include <soc/pci_devs.h>
   6 #include <soc/pcu.h>
   7 #include <soc/ramstage.h>
   8 #include <soc/util.h>
   9
  10 static void pcu0_final(struct device *dev)
  11 {
  12         printk(BIOS_INFO, "%s: locking registers\n", dev_path(dev));
  13         pci_or_config32(dev, PCU_CR0_P_STATE_LIMITS, P_STATE_LIMITS_LOCK);
  14         pci_or_config32(dev, PCU_CR0_PACKAGE_RAPL_LIMIT_UPR,
  15                         PKG_PWR_LIM_LOCK_UPR);
  16         pci_or_config32(dev, PCU_CR0_TURBO_ACTIVATION_RATIO,
  17                         TURBO_ACTIVATION_RATIO_LOCK);
  18
  19         /* Set PMAX_LOCK - must be set before RESET CPL4 */
  20         pci_or_config32(dev, PCU_CR0_PMAX, PMAX_LOCK);
  21 }
  22
  23 static struct device_operations pcu0_ops = {
  24         .read_resources   = pci_dev_read_resources,
  25         .set_resources    = pci_dev_set_resources,
  26         .enable_resources = pci_dev_enable_resources,
  27         .final            = pcu0_final,
  28 };
  29
  30 static const struct pci_driver pcu0_driver __pci_driver = {
  31         .ops = &pcu0_ops,
  32         .vendor = PCI_VID_INTEL,
  33         .device = PCU_CR0_DEVID,
  34 };