src/soc/mediatek/common/spm_v1.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <device/mmio.h>
   4 #include <soc/spm.h>
   5 #include <delay.h>
   6
   7 void spm_init_pcm_register(void)
   8 {
   9         /* Init r0 with POWER_ON_VAL0 */
  10         write32(&mtk_spm->pcm_reg_data_ini,
  11                 read32(&mtk_spm->spm_power_on_val0));
  12         write32(&mtk_spm->pcm_pwr_io_en, PCM_RF_SYNC_R0);
  13         write32(&mtk_spm->pcm_pwr_io_en, 0);
  14
  15         /* Init r7 with POWER_ON_VAL1 */
  16         write32(&mtk_spm->pcm_reg_data_ini,
  17                 read32(&mtk_spm->spm_power_on_val1));
  18         write32(&mtk_spm->pcm_pwr_io_en, PCM_RF_SYNC_R7);
  19         write32(&mtk_spm->pcm_pwr_io_en, 0);
  20 }
  21
  22 void spm_kick_pcm_to_run(const struct pwr_ctrl *pwrctrl)
  23 {
  24         /* Waiting for loading SPMFW done*/
  25         while (read32(&mtk_spm->md32pcm_dma0_rlct) != 0x0)
  26                 ;
  27
  28         /* Init register to match PCM expectation */
  29         write32(&mtk_spm->spm_bus_protect_mask_b, SPM_BUS_PROTECT_MASK_B_DEF);
  30         write32(&mtk_spm->spm_bus_protect2_mask_b,
  31                 SPM_BUS_PROTECT2_MASK_B_DEF);
  32         write32(&mtk_spm->pcm_reg_data_ini, 0);
  33
  34         spm_set_pcm_flags(pwrctrl);
  35
  36         /* Kick PCM to run (only toggle PCM_KICK) */
  37         setbits32(&mtk_spm->pcm_con0, SPM_REGWR_CFG_KEY | PCM_CK_EN_LSB);
  38
  39         /* Reset md32pcm */
  40         SET32_BITFIELDS(&mtk_spm->md32pcm_cfgreg_sw_rstn,
  41                         MD32PCM_CFGREG_SW_RSTN_RESET, 1);
  42
  43         /* Waiting for SPM init done */
  44         udelay(SPM_INIT_DONE_US);
  45 }