src/soc/mediatek/mt8173/memlayout.ld

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <soc/memlayout.h>
   4
   5 SECTIONS
   6 {
   7         SRAM_L2C_START(0x000C0000)
   8         BOOTBLOCK(0x000C1000, 85K)
   9         VERSTAGE(0x000D7000, 114K)
  10         SRAM_L2C_END(0x00100000)
  11
  12         SRAM_START(0x00100000)
  13         VBOOT2_WORK(0x00100000, 12K)
  14         TPM_LOG(0x00103000, 2K)
  15         FMAP_CACHE(0x00103800, 2K)
  16         PRERAM_CBMEM_CONSOLE(0x00104000, 12K)
  17         WATCHDOG_TOMBSTONE(0x00107000, 4)
  18         PRERAM_CBFS_CACHE(0x00107004, 8K - 4)
  19         CBFS_MCACHE(0x00109000, 8K)
  20         TIMESTAMP(0x0010B000, 4K)
  21         ROMSTAGE(0x0010C000, 92K)
  22         STACK(0x00124000, 16K)
  23         TTB(0x00128000, 28K)
  24         DMA_COHERENT(0x0012F000, 4K)
  25         SRAM_END(0x00130000)
  26
  27         DRAM_START(0x40000000)
  28         DRAM_DMA(0x40000000, 1M)
  29         POSTRAM_CBFS_CACHE(0x40100000, 1M)
  30         RAMSTAGE(0x40200000, 2M)
  31 }