src/soc/mediatek/mt8173/mt6311.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <console/console.h>
   4 #include <device/i2c_simple.h>
   5 #include <soc/mt6311.h>
   6
   7 enum {
   8         MT6311_SLAVE_ADDR = 0x6B,
   9 };
  10
  11 static u32 get_mt6311_chip_id(uint8_t i2c_num)
  12 {
  13         unsigned char id[2] = {0};
  14
  15         i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_CID,
  16                        &id[0], 0xFF, 0);
  17         i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_SWCID,
  18                        &id[1], 0xFF, 0);
  19
  20         return (u32)(id[0] << 8 | id[1]);
  21 }
  22
  23 static void mt6311_hw_init(uint8_t i2c_num)
  24 {
  25         int ret = 0;
  26         unsigned char var[3] = {0};
  27
  28         /*
  29          * Phase Shedding Trim Software Setting
  30          * The phase 2 of MT6311 will enter PWM mode if the threshold is
  31          * reached.
  32          * The threshold is set according to EFUSE value.
  33          */
  34         ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR,
  35                               MT6311_EFUSE_DOUT_56_63, &var[0],
  36                               0x3, 1);
  37         ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR,
  38                               MT6311_EFUSE_DOUT_56_63, &var[1],
  39                               0x1, 7);
  40         ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR,
  41                               MT6311_EFUSE_DOUT_64_71, &var[2],
  42                               0x1, 0);
  43
  44         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
  45                                MT6311_VDVFS1_ANA_CON10,
  46                                var[0] | var[1] << 2 | var[2] << 3, 0xf, 0);
  47
  48         /* I2C_CONFIG; pushpull setting, Opendrain is '0' */
  49         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_TOP_INT_CON,
  50                                0x1, 0x1, 2);
  51         /* RG_WDTRSTB_EN; CC, initial WDRSTB setting. */
  52         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_TOP_RST_CON,
  53                                0x1, 0x1, 5);
  54         /* initial INT function */
  55         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_GPIO_MODE,
  56                                0x1, 0x7, 3);
  57         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_STRUP_CON5,
  58                                0, 1 << 2 | 1 << 1 | 1 << 0, 0);
  59
  60         /* Vo max is 1.15V */
  61         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
  62                                MT6311_STRUP_ANA_CON1, 0x3, 0x3, 5);
  63         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
  64                                MT6311_BUCK_ALL_CON23, 0x1, 0x1, 0);
  65         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
  66                                MT6311_STRUP_ANA_CON2, 0x3, 0x3, 0);
  67         /* Suspend HW control from SPM */
  68         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
  69                                MT6311_TOP_CON, 0x1, 0x1, 0);
  70         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
  71                                MT6311_VDVFS11_CON7, 0x1, 0x1, 0);
  72         /* default VDVFS power on */
  73         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
  74                                MT6311_VDVFS11_CON9, 0x1, 0x1, 0);
  75         /* for DVFS slew rate rising=0.67us */
  76         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
  77                                MT6311_VDVFS11_CON10, 0x1, 0x7f, 0);
  78         /* for DVFS slew rate, falling 2.0us */
  79         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
  80                                MT6311_VDVFS11_CON11, 0x5, 0x7f, 0);
  81         /* default VDVFS11_VOSEL 1.0V, SW control */
  82         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
  83                                MT6311_VDVFS11_CON12, 0x40, 0x7f, 0);
  84         /* default VDVFS11_VOSEL_ON 1.0V, HW control */
  85         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
  86                                MT6311_VDVFS11_CON13, 0x40, 0x7f, 0);
  87         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
  88                                MT6311_VDVFS11_CON14, 0x40, 0x7f, 0);
  89         /* for DVFS sof change, falling 50us */
  90         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
  91                                MT6311_VDVFS11_CON19, 0x3, 0x3, 0);
  92         /* for DVFS sof change, falling only */
  93         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
  94                                MT6311_VDVFS11_CON19, 0x1, 0x3, 4);
  95         /* OFF LDO */
  96         ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
  97                                MT6311_LDO_CON3, 0, 0x1, 0);
  98
  99         if (ret)
 100                 printk(BIOS_ERR, "%s failed\n", __func__);
 101 }
 102
 103 void mt6311_probe(uint8_t i2c_num)
 104 {
 105         u32 val = 0;
 106
 107         /* Check device ID is MT6311 */
 108         val = get_mt6311_chip_id(i2c_num);
 109         printk(BIOS_INFO, "%s: device ID = %#x\n", __func__, val);
 110
 111         if (val < MT6311_E1_CID_CODE) {
 112                 printk(BIOS_ERR, "unknown MT6311 device_id\n");
 113                 return;
 114         }
 115
 116         mt6311_hw_init(i2c_num);
 117 }