soc/intel/xeon_sp: Allow OS to control LTR and AER
[coreboot2.git] / src / soc / mediatek / mt8186 / Kconfig
blobdea0d29a0ae5bdbe0653d53cfa5e5ca4fc45886b
1 ## SPDX-License-Identifier: GPL-2.0-only
3 config SOC_MEDIATEK_MT8186
4         bool
5         default n
6         select ARCH_BOOTBLOCK_ARMV8_64
7         select ARCH_VERSTAGE_ARMV8_64
8         select ARCH_ROMSTAGE_ARMV8_64
9         select ARCH_RAMSTAGE_ARMV8_64
10         select ARM64_USE_ARM_TRUSTED_FIRMWARE
11         select CACHE_MRC_SETTINGS
12         select HAVE_UART_SPECIAL
13         select SOC_MEDIATEK_COMMON
14         select MEDIATEK_DRAM_BLOB_FAST_INIT
15         select USE_CBMEM_DRAM_INFO
16         select FLASH_DUAL_IO_READ
17         select PWRAP_WITH_PMIF_SPMI
18         select PMIF_SPMI_IOCFG_DEFAULT_SETTING
20 if SOC_MEDIATEK_MT8186
22 config VBOOT
23         select VBOOT_MUST_REQUEST_DISPLAY
24         select VBOOT_STARTS_IN_BOOTBLOCK
25         select VBOOT_SEPARATE_VERSTAGE
26         select VBOOT_RETURN_FROM_VERSTAGE
28 config SPM_FIRMWARE
29         string
30         default "spm_firmware.bin"
31         help
32           The file name of the MediaTek SPM firmware.
34 config SSPM_FIRMWARE
35         string
36         default "sspm.bin"
37         help
38           The file name of the MediaTek SSPM firmware.
40 endif