drivers/mipi: Add support for KD_KD110N11_51IE panel
[coreboot2.git] / src / soc / mediatek / mt8186 / i2c.c
blob536627583e5b56459e7e8ee7620029157052a77b
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 /*
4 * This file is created based on MT8186 Functional Specification
5 * Chapter number: 5.10
6 */
8 #include <assert.h>
9 #include <console/console.h>
10 #include <device/mmio.h>
11 #include <device/i2c_simple.h>
12 #include <gpio.h>
13 #include <soc/i2c.h>
15 struct mtk_i2c mtk_i2c_bus_controller[] = {
16 [0] = {
17 .i2c_regs = (void *)(I2C0_BASE),
18 .i2c_dma_regs = (void *)(I2C0_DMA_BASE),
20 [1] = {
21 .i2c_regs = (void *)(I2C1_BASE),
22 .i2c_dma_regs = (void *)(I2C1_DMA_BASE),
24 [2] = {
25 .i2c_regs = (void *)(I2C2_BASE),
26 .i2c_dma_regs = (void *)(I2C2_DMA_BASE),
28 [3] = {
29 .i2c_regs = (void *)(I2C3_BASE),
30 .i2c_dma_regs = (void *)(I2C3_DMA_BASE),
32 [4] = {
33 .i2c_regs = (void *)(I2C4_BASE),
34 .i2c_dma_regs = (void *)(I2C4_DMA_BASE),
36 [5] = {
37 .i2c_regs = (void *)(I2C5_BASE),
38 .i2c_dma_regs = (void *)(I2C5_DMA_BASE),
40 [6] = {
41 .i2c_regs = (void *)(I2C6_BASE),
42 .i2c_dma_regs = (void *)(I2C6_DMA_BASE),
44 [7] = {
45 .i2c_regs = (void *)(I2C7_BASE),
46 .i2c_dma_regs = (void *)(I2C7_DMA_BASE),
48 [8] = {
49 .i2c_regs = (void *)(I2C8_BASE),
50 .i2c_dma_regs = (void *)(I2C8_DMA_BASE),
52 [9] = {
53 .i2c_regs = (void *)(I2C9_BASE),
54 .i2c_dma_regs = (void *)(I2C9_DMA_BASE),
58 _Static_assert(ARRAY_SIZE(mtk_i2c_bus_controller) == I2C_BUS_NUMBER,
59 "Wrong size of mtk_i2c_bus_controller");
61 static const struct pad_func i2c_funcs[I2C_BUS_NUMBER][2] = {
62 [0] = {
63 PAD_FUNC_UP(SDA0, SDA0),
64 PAD_FUNC_UP(SCL0, SCL0),
66 [1] = {
67 PAD_FUNC_UP(SDA1, SDA1),
68 PAD_FUNC_UP(SCL1, SCL1),
70 [2] = {
71 PAD_FUNC_UP(SDA2, SDA2),
72 PAD_FUNC_UP(SCL2, SCL2),
74 [3] = {
75 PAD_FUNC_UP(SDA3, SDA3),
76 PAD_FUNC_UP(SCL3, SCL3),
78 [4] = {
79 PAD_FUNC_UP(SDA4, SDA4),
80 PAD_FUNC_UP(SCL4, SCL4),
82 [5] = {
83 PAD_FUNC_UP(SDA5, SDA5),
84 PAD_FUNC_UP(SCL5, SCL5),
86 [6] = {
87 PAD_FUNC_UP(SDA6, SDA6),
88 PAD_FUNC_UP(SCL6, SCL6),
90 [7] = {
91 PAD_FUNC_UP(SDA7, SDA7),
92 PAD_FUNC_UP(SCL7, SCL7),
94 [8] = {
95 PAD_FUNC_UP(SDA8, SDA8),
96 PAD_FUNC_UP(SCL8, SCL8),
98 [9] = {
99 PAD_FUNC_UP(SDA9, SDA9),
100 PAD_FUNC_UP(SCL9, SCL9),
104 static void mtk_i2c_set_gpio_pinmux(uint8_t bus)
106 assert(bus < I2C_BUS_NUMBER);
108 const struct pad_func *ptr = i2c_funcs[bus];
109 for (size_t i = 0; i < 2; i++) {
110 gpio_set_mode(ptr[i].gpio, ptr[i].func);
111 gpio_set_pull(ptr[i].gpio, GPIO_PULL_ENABLE, ptr[i].select);
115 void mtk_i2c_bus_init(uint8_t bus, uint32_t speed)
117 mtk_i2c_speed_init(bus, speed);
118 mtk_i2c_set_gpio_pinmux(bus);
121 void mtk_i2c_dump_more_info(struct mt_i2c_regs *regs)
123 printk(BIOS_DEBUG, "LTIMING %x\nCLK_DIV %x\n",
124 read32(&regs->ltiming),
125 read32(&regs->clock_div));
128 void mtk_i2c_config_timing(struct mt_i2c_regs *regs, struct mtk_i2c *bus_ctrl)
130 write32(&regs->clock_div, bus_ctrl->ac_timing.inter_clk_div);
131 write32(&regs->timing, bus_ctrl->ac_timing.htiming);
132 write32(&regs->ltiming, bus_ctrl->ac_timing.ltiming);
133 write32(&regs->hs, bus_ctrl->ac_timing.hs);
134 write32(&regs->ext_conf, bus_ctrl->ac_timing.ext);