src/soc/mediatek/mt8186/mt6315.c

   1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
   2
   3 #include <soc/mt6315.h>
   4
   5 /*
   6  * These values are used by MediaTek internally.
   7  * We can find these registers in "MT6315 datasheet v1.3.pdf".
   8  * The setting values are provided by MeidaTek designers.
   9  */
  10
  11 static const struct mt6315_setting init_setting_cpu[] = {
  12         /* remove protection */
  13         {0x3A9, 0x63, 0xFF, 0},
  14         {0x3A8, 0x15, 0xFF, 0},
  15         {0x3A0, 0x9C, 0xFF, 0},
  16         {0x39F, 0xEA, 0xFF, 0},
  17         {0x993, 0x47, 0xFF, 0},
  18         {0x992, 0x29, 0xFF, 0},
  19         {0x1418, 0x55, 0xFF, 0},
  20         {0x1417, 0x43, 0xFF, 0},
  21         {0x3A2, 0x2A, 0xFF, 0},
  22         {0x3A1, 0x7C, 0xFF, 0},
  23         /* init settings for mt6315 */
  24         {0x997, 0xF, 0x7F, 0},
  25         {0x999, 0xF0, 0xF0, 0},
  26         {0x9A0, 0x0, 0x1F, 0},
  27         {0x9A1, 0x0, 0x1F, 0},
  28         {0x9A2, 0x0, 0x1F, 0},
  29         {0x9A3, 0x0, 0x1F, 0},
  30         {0x1440, 0x0, 0xE, 0},
  31         {0x1487, 0x58, 0xFF, 0},
  32         {0x148B, 0x3, 0x7F, 0},
  33         {0x148C, 0x3, 0x7F, 0},
  34         {0x1507, 0x58, 0xFF, 0},
  35         {0x150B, 0x3, 0x7F, 0},
  36         {0x150C, 0x3, 0x7F, 0},
  37         {0x1587, 0x58, 0xFF, 0},
  38         {0x158B, 0x3, 0x7F, 0},
  39         {0x158C, 0x3, 0x7F, 0},
  40         {0x1607, 0x58, 0xFF, 0},
  41         {0x160B, 0x3, 0x7F, 0},
  42         {0x160C, 0x3, 0x7F, 0},
  43         {0x1687, 0x22, 0x76, 0},
  44         {0x1688, 0xF, 0x2F, 0},
  45         {0x1689, 0xA1, 0xE1, 0},
  46         {0x168A, 0x79, 0x7F, 0},
  47         {0x168B, 0x12, 0x3F, 0},
  48         {0x168D, 0xC, 0xC, 0},
  49         {0x168E, 0xD7, 0xFF, 0},
  50         {0x168F, 0x81, 0xFF, 0},
  51         {0x1690, 0x3, 0x3F, 0},
  52         {0x1691, 0x22, 0x76, 0},
  53         {0x1692, 0xF, 0x2F, 0},
  54         {0x1693, 0xA1, 0xE1, 0},
  55         {0x1694, 0x79, 0x7F, 0},
  56         {0x1695, 0x12, 0x3F, 0},
  57         {0x1697, 0xC, 0xC, 0},
  58         {0x1698, 0xD7, 0xFF, 0},
  59         {0x1699, 0x81, 0xFF, 0},
  60         {0x169A, 0x3, 0x3F, 0},
  61         {0x169B, 0x22, 0x76, 0},
  62         {0x169C, 0xF, 0x2F, 0},
  63         {0x169D, 0xA1, 0xE1, 0},
  64         {0x169E, 0x79, 0xFF, 0},
  65         {0x169F, 0x12, 0x3F, 0},
  66         {0x16A1, 0xC, 0xC, 0},
  67         {0x16A2, 0xD7, 0xFF, 0},
  68         {0x16A3, 0x81, 0xFF, 0},
  69         {0x16A4, 0x3, 0x3F, 0},
  70         {0x16A5, 0x22, 0x76, 0},
  71         {0x16A6, 0xF, 0x2F, 0},
  72         {0x16A7, 0xA1, 0xE1, 0},
  73         {0x16A8, 0x79, 0xFF, 0},
  74         {0x16A9, 0x12, 0x3F, 0},
  75         {0x16AB, 0xC, 0xC, 0},
  76         {0x16AC, 0xD7, 0xFF, 0},
  77         {0x16AD, 0x81, 0xFF, 0},
  78         {0x16AE, 0x3, 0x3F, 0},
  79         {0x16CE, 0x0, 0x8, 0},
  80         {0x13, 0x2, 0x2, 0},
  81         {0x15, 0x1F, 0x1F, 0},
  82         {0x22, 0x12, 0x12, 0},
  83         {0x8A, 0x6, 0xF, 0},
  84         {0x10B, 0x3, 0x3, 0},
  85         {0x38B, 0x4, 0xFF, 0},
  86         {0xA07, 0x0, 0x1, 0},
  87         {0xA1A, 0x1F, 0x1F, 0},
  88         {0x1457, 0x0, 0xFF, 0},
  89         /* add protection */
  90         {0x3A1, 0x0, 0xFF, 0},
  91         {0x3A2, 0x0, 0xFF, 0},
  92         {0x1417, 0x0, 0xFF, 0},
  93         {0x1418, 0x0, 0xFF, 0},
  94         {0x992, 0x0, 0xFF, 0},
  95         {0x993, 0x0, 0xFF, 0},
  96         {0x39F, 0x0, 0xFF, 0},
  97         {0x3A0, 0x0, 0xFF, 0},
  98         {0x3A8, 0x0, 0xFF, 0},
  99         {0x3A9, 0x0, 0xFF, 0},
 100 };
 101
 102 void mt6315_init_setting(void)
 103 {
 104         for (int i = 0; i < ARRAY_SIZE(init_setting_cpu); i++)
 105                 mt6315_write_field(MT6315_CPU,
 106                                    init_setting_cpu[i].addr, init_setting_cpu[i].val,
 107                                    init_setting_cpu[i].mask, init_setting_cpu[i].shift);
 108 }