mb/google/nissa/var/gothrax: Add probe and GPIO config for HDMI and
[coreboot2.git] / src / soc / mediatek / mt8195 / soc.c
blob20a9811d15c00f9a91283aa28c1acaf9c7294b7e
1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
3 #include <bootmem.h>
4 #include <console/console.h>
5 #include <device/device.h>
6 #include <device/pci.h>
7 #include <soc/apusys.h>
8 #include <soc/apusys_devapc.h>
9 #include <soc/devapc.h>
10 #include <soc/dfd.h>
11 #include <soc/emi.h>
12 #include <soc/hdmi.h>
13 #include <soc/mcupm.h>
14 #include <soc/mmu_operations.h>
15 #include <soc/pcie.h>
16 #include <soc/sspm.h>
17 #include <soc/ufs.h>
18 #include <symbols.h>
20 void bootmem_platform_add_ranges(void)
22 if (CONFIG(MTK_DFD))
23 bootmem_add_range(DFD_DUMP_ADDRESS, DFD_DUMP_SIZE, BM_MEM_RESERVED);
26 static void soc_read_resources(struct device *dev)
28 ram_range(dev, 0, (uintptr_t)_dram, sdram_size());
31 static void soc_init(struct device *dev)
33 mtk_mmu_disable_l2c_sram();
34 dapc_init();
35 start_apusys_devapc();
36 apusys_init();
37 mcupm_init();
38 sspm_init();
40 if (CONFIG(MTK_DFD))
41 dfd_init();
43 ufs_disable_refclk();
44 hdmi_low_power_setting();
47 static struct device_operations soc_ops = {
48 .read_resources = soc_read_resources,
49 .set_resources = noop_set_resources,
50 .init = soc_init,
53 static struct device_operations pci_domain_ops = {
54 .read_resources = &mtk_pcie_domain_read_resources,
55 .set_resources = &mtk_pcie_domain_set_resources,
56 .scan_bus = &pci_host_bridge_scan_bus,
57 .enable = &mtk_pcie_domain_enable,
60 static void enable_soc_dev(struct device *dev)
62 if (dev->path.type == DEVICE_PATH_CPU_CLUSTER)
63 dev->ops = &soc_ops;
64 else if (dev->path.type == DEVICE_PATH_DOMAIN) {
65 if (mainboard_needs_pcie_init())
66 dev->ops = &pci_domain_ops;
67 else
68 printk(BIOS_DEBUG, "Skip setting PCIe ops\n");
72 struct chip_operations soc_mediatek_mt8195_ops = {
73 .name = "SOC Mediatek MT8195",
74 .enable_dev = enable_soc_dev,