src/soc/mediatek/mt8196/booker.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <console/console.h>
   4 #include <device/mmio.h>
   5 #include <soc/addressmap.h>
   6 #include <soc/booker.h>
   7
   8 #define REG_READ_ONLY_HASH_VALUE        (MCUCFG_BASE + 0x059C)
   9 #define REG_MCUSYS_RESERVED_REG2        (MCUCFG_BASE + 0xFFE8)
  10
  11 #define POR_SBSX_CFG_CTL_OFFSET         (0x00450000 + 0x0A00)
  12 #define INSTANCE0_SBSX_POR_SBSX_CFG_CTL (0x0A000000 + POR_SBSX_CFG_CTL_OFFSET)
  13 #define INSTANCE1_SBSX_POR_SBSX_CFG_CTL (0x0A800000 + POR_SBSX_CFG_CTL_OFFSET)
  14 #define INSTANCE2_SBSX_POR_SBSX_CFG_CTL (0x0B000000 + POR_SBSX_CFG_CTL_OFFSET)
  15 #define INSTANCE3_SBSX_POR_SBSX_CFG_CTL (0x0B800000 + POR_SBSX_CFG_CTL_OFFSET)
  16 #define BIT_DISABLE_CMO_PROP            BIT(3)
  17
  18 /*
  19  * Configure booker and disable HN-D coherence request to avoid
  20  * receiving NDE(Non-data Error) before MMU enabled.
  21  */
  22 void booker_init(void)
  23 {
  24         /* Enable CMO(cache maintenance operations) propagation */
  25         clrbits64p(INSTANCE0_SBSX_POR_SBSX_CFG_CTL, BIT_DISABLE_CMO_PROP);
  26         clrbits64p(INSTANCE1_SBSX_POR_SBSX_CFG_CTL, BIT_DISABLE_CMO_PROP);
  27         clrbits64p(INSTANCE2_SBSX_POR_SBSX_CFG_CTL, BIT_DISABLE_CMO_PROP);
  28         clrbits64p(INSTANCE3_SBSX_POR_SBSX_CFG_CTL, BIT_DISABLE_CMO_PROP);
  29         dsb();
  30         isb();
  31
  32         /* CHI Splitter - for Q-Channel setting */
  33         setbits32p(REG_MCUSYS_RESERVED_REG2, BIT(0));
  34
  35         printk(BIOS_DEBUG, "[%s] AP hash rule: 0x%x\n",
  36                __func__,
  37                read32p(REG_READ_ONLY_HASH_VALUE));
  38 }