src/soc/nvidia/tegra124/bootblock.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <assert.h>
   4 #include <arch/exception.h>
   5 #include <arch/stages.h>
   6 #include <bootblock_common.h>
   7 #include <console/console.h>
   8 #include <program_loading.h>
   9 #include <soc/clock.h>
  10 #include <soc/nvidia/tegra/apbmisc.h>
  11 #include <soc/pinmux.h>
  12 #include <soc/power.h>
  13 #include <timestamp.h>
  14 #include <vendorcode/google/chromeos/chromeos.h>
  15
  16 /* called from assembly in bootblock_asm.S */
  17 void tegra124_main(void);
  18
  19 static void run_next_stage(void *entry)
  20 {
  21         ASSERT(entry);
  22         clock_cpu0_config(entry);
  23
  24         power_enable_and_ungate_cpu();
  25
  26         /* Repair RAM on cluster0 and cluster1 after CPU is powered on. */
  27         ram_repair();
  28
  29         clock_cpu0_remove_reset();
  30
  31         clock_halt_avp();
  32 }
  33
  34 void tegra124_main(void)
  35 {
  36         // enable pinmux clamp inputs
  37         clamp_tristate_inputs();
  38
  39         // enable JTAG at the earliest stage
  40         enable_jtag();
  41
  42         clock_early_uart();
  43
  44         // Serial out, tristate off.
  45         pinmux_set_config(PINMUX_KB_ROW9_INDEX, PINMUX_KB_ROW9_FUNC_UA3);
  46         // Serial in, tristate_on.
  47         pinmux_set_config(PINMUX_KB_ROW10_INDEX, PINMUX_KB_ROW10_FUNC_UA3 |
  48                                                  PINMUX_PULL_UP |
  49                                                  PINMUX_INPUT_ENABLE);
  50         // Mux some pins away from uart A.
  51         pinmux_set_config(PINMUX_UART2_CTS_N_INDEX,
  52                           PINMUX_UART2_CTS_N_FUNC_UB3 |
  53                           PINMUX_INPUT_ENABLE);
  54         pinmux_set_config(PINMUX_UART2_RTS_N_INDEX,
  55                           PINMUX_UART2_RTS_N_FUNC_UB3);
  56
  57         if (CONFIG(BOOTBLOCK_CONSOLE)) {
  58                 console_init();
  59                 exception_init();
  60         }
  61
  62         clock_init();
  63
  64         bootblock_mainboard_init();
  65
  66         pinmux_set_config(PINMUX_CORE_PWR_REQ_INDEX,
  67                           PINMUX_CORE_PWR_REQ_FUNC_PWRON);
  68         pinmux_set_config(PINMUX_CPU_PWR_REQ_INDEX,
  69                           PINMUX_CPU_PWR_REQ_FUNC_CPU);
  70         pinmux_set_config(PINMUX_PWR_INT_N_INDEX,
  71                           PINMUX_PWR_INT_N_FUNC_PMICINTR |
  72                           PINMUX_INPUT_ENABLE);
  73
  74         timestamp_init(0);
  75
  76         run_romstage();
  77 }
  78
  79 void platform_prog_run(struct prog *prog)
  80 {
  81         run_next_stage(prog_entry(prog));
  82 }