src/soc/samsung/exynos5420/Makefile.mk

   1 ## SPDX-License-Identifier: GPL-2.0-only
   2 ifeq ($(CONFIG_CPU_SAMSUNG_EXYNOS5420),y)
   3
   4 bootblock-y += spi.c alternate_cbfs.c
   5 bootblock-y += bootblock.c
   6 bootblock-y += pinmux.c timer.c power.c
   7 # Clock is required for UART
   8 bootblock-y += clock_init.c
   9 bootblock-y += clock.c
  10 bootblock-y += uart.c
  11 bootblock-y += wakeup.c
  12 bootblock-y += gpio.c
  13
  14 romstage-y += spi.c alternate_cbfs.c
  15 romstage-y += smp.c
  16 romstage-y += clock.c
  17 romstage-y += clock_init.c
  18 romstage-y += pinmux.c  # required by s3c24x0_i2c and uart.
  19 romstage-y += dmc_common.c
  20 romstage-y += dmc_init_ddr3.c
  21 romstage-y += power.c
  22 romstage-y += timer.c
  23 romstage-y += uart.c
  24 romstage-y += wakeup.c
  25 romstage-y += gpio.c
  26 romstage-y += i2c.c
  27 #romstage-y += wdt.c
  28 romstage-y += cbmem.c
  29 romstage-y += trustzone.c
  30
  31 ramstage-y += spi.c alternate_cbfs.c
  32 ramstage-y += clock.c
  33 ramstage-y += clock_init.c
  34 ramstage-y += pinmux.c
  35 ramstage-y += power.c
  36 ramstage-y += uart.c
  37 ramstage-y += cpu.c
  38 ramstage-y += tmu.c
  39 ramstage-y += timer.c
  40 ramstage-y += gpio.c
  41 ramstage-y += i2c.c
  42 ramstage-y += dp.c dp_lowlevel.c fimd.c
  43 ramstage-y += usb.c
  44
  45 rmodules_$(ARCH-ROMSTAGE-y)-y += timer.c
  46
  47 CPPFLAGS_common += -Isrc/soc/samsung/common/include/
  48 CPPFLAGS_common += -Isrc/soc/samsung/exynos5420/include/
  49
  50 $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
  51         @printf "    BL1, CKSUM $(subst $(obj)/,,$(@))\n"
  52         util/exynos/variable_cksum.py $< $<.cksum
  53         cat 3rdparty/blobs/cpu/samsung/exynos5420/bl1.bin $<.cksum > $@
  54
  55 endif