src/soc/samsung/exynos5420/power.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 /* Power setup code for EXYNOS5 */
   4
   5 #include <device/mmio.h>
   6 #include <halt.h>
   7 #include <soc/dmc.h>
   8 #include <soc/power.h>
   9 #include <soc/setup.h>
  10
  11 /* Set the PS-Hold drive value */
  12 static void ps_hold_setup(void)
  13 {
  14         /* Set PS-Hold high */
  15         setbits32(&exynos_power->ps_hold_ctrl,
  16                      POWER_PS_HOLD_CONTROL_DATA_HIGH);
  17 }
  18
  19 void power_reset(void)
  20 {
  21         /* Clear inform1 so there's no change we think we've got a wake reset */
  22         exynos_power->inform1 = 0;
  23
  24         setbits32(&exynos_power->sw_reset, 1);
  25 }
  26
  27 /* This function never returns */
  28 void power_shutdown(void)
  29 {
  30         clrbits32(&exynos_power->ps_hold_ctrl,
  31                      POWER_PS_HOLD_CONTROL_DATA_HIGH);
  32
  33         halt();
  34 }
  35
  36 void power_enable_dp_phy(void)
  37 {
  38         setbits32(&exynos_power->dptx_phy_control, EXYNOS_DP_PHY_ENABLE);
  39 }
  40
  41 void power_enable_hw_thermal_trip(void)
  42 {
  43         /* Enable HW thermal trip */
  44         setbits32(&exynos_power->ps_hold_ctrl, POWER_ENABLE_HW_TRIP);
  45 }
  46
  47 uint32_t power_read_reset_status(void)
  48 {
  49         return exynos_power->inform1;
  50 }
  51
  52 void power_exit_wakeup(void)
  53 {
  54         typedef void (*resume_func)(void);
  55
  56         ((resume_func)exynos_power->inform0)();
  57 }
  58
  59 int power_init(void)
  60 {
  61         ps_hold_setup();
  62         return 0;
  63 }
  64
  65 void power_enable_xclkout(void)
  66 {
  67         /* use xxti for xclk out */
  68         clrsetbits32(&exynos_power->pmu_debug, PMU_DEBUG_CLKOUT_SEL_MASK,
  69                         PMU_DEBUG_XXTI);
  70 }
  71
  72 void power_release_uart_retention(void)
  73 {
  74         write32(&exynos_power->padret_uart_opt, 1 << 28);
  75 }