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HEAD
mb/topton/adl: Enable TPM2 (Intel fTPM/PTT)
[coreboot2.git]
/
src
/
soc
/
ucb
/
riscv
/
chip.c
blob
2e0f528128eb097e3eb9dd4e4689f57d9eef1396
1
/* SPDX-License-Identifier: GPL-2.0-only */
2
3
#include <device/device.h>
4
5
struct
chip_operations soc_ucb_riscv_ops
= {
6
.
name
=
"UCB RISC-V"
,
7
};