src/superio/nuvoton/npcd378/npcd378.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #ifndef SUPERIO_NUVOTON_NPCD378_H
   4 #define SUPERIO_NUVOTON_NPCD378_H
   5
   6 #include <stdint.h>
   7
   8 /* HWM at LDN8 */
   9 #define NPCD837_HWM_WRITE_LOCK_CTRL 0x4
  10 #define NPCD837_HWM_WRITE_LOCK_BIT 0x1
  11
  12 #define NPCD378_HWM_PSU_FAN_MIN 0x17
  13 #define NPCD378_HWM_PSU_FAN_MAX 0xf8
  14 #define NPCD378_HWM_PSU_FAN_PWM_CTRL 0x198
  15
  16 /*
  17  * Read HWM register at specific page and offset.
  18  *
  19  * @param iobase IOBASE address of LDN8
  20  * @param reg MSB is page, LSB sets the offset in selected page
  21  *
  22  * @return Byte read from HWM
  23  */
  24 uint8_t npcd378_hwm_read(const uint16_t iobase, const uint16_t reg);
  25
  26 /*
  27  * Write to HWM register at specific page and offset.
  28  *
  29  * @param iobase IOBASE address of LDN8
  30  * @param reg MSB is page, LSB sets the offset in selected page
  31  * @param val The value to write to HWM register
  32  */
  33 void npcd378_hwm_write(const uint16_t iobase, const uint16_t reg, const uint8_t val);
  34
  35 /*
  36  * Notify SuperIO a host-to-device transfer is ongoing.
  37  * Has to be called before any register in HWM is written to.
  38  *
  39  * @param iobase IOBASE address of LDN8
  40  */
  41 void npcd378_hwm_write_start(const uint16_t iobase);
  42
  43 /*
  44  * Notify SuperIO a host-to-device transfer has finished.
  45  * Has to be called after any register in HWM was written to.
  46  *
  47  * @param iobase IOBASE address of LDN8
  48  */
  49 void npcd378_hwm_write_finished(const uint16_t iobase);
  50
  51 /* Logical Device Numbers (LDN). */
  52 /* Default Nuvoton hardware: */
  53 #define NPCD378_FDC             0x00 /* Floppy */
  54 #define NPCD378_PP              0x01 /* Parallel port */
  55 #define NPCD378_SP1             0x02 /* Com1 */
  56 #define NPCD378_SP2             0x03 /* Com2 & IR */
  57 #define NPCD378_PWR             0x04 /* LED and PWR button control */
  58 #define NPCD378_AUX             0x05 /* PS/2 mouse */
  59 #define NPCD378_KBC             0x06 /* PS/2 keyboard */
  60 /* The following is guessed based on observation and might be wrong: */
  61 #define NPCD378_WDT1            0x07
  62 #define NPCD378_HWM             0x08 /* HWM: 16 pages with each 255 byte */
  63 #define NPCD378_GPIO_PP_OD      0x0F /* GPIO Push-Pull/Open drain select */
  64 #define NPCD378_I2C             0x15 /* Provides 35Khz at IOBASE + 0x9 */
  65 #define NPCD378_SUSPEND         0x1c /* Suspend control ? */
  66 #define NPCD378_GPIOA           0x1e
  67
  68 #endif /* SUPERIO_NUVOTON_NPCD378_H */