util/intelp2m/platforms/lbg/lbg_test.go

   1 package lbg_test
   2
   3 import (
   4         "testing"
   5
   6         "review.coreboot.org/coreboot.git/util/intelp2m/platforms/lbg"
   7         "review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
   8         "review.coreboot.org/coreboot.git/util/intelp2m/platforms/test"
   9 )
  10
  11 func TestGenMacro(t *testing.T) {
  12         lewisburg := lbg.PlatformSpecific{InheritanceMacro: snr.PlatformSpecific{}}
  13         test.Suite{
  14                 { /* GPP_A1 - ESPI_ALERT1#  */
  15                         Pad: test.Pad{ID: "GPP_A1", DW0: 0x44000c00, DW1: 0x00003000, Ownership: 1},
  16                         Macro: test.Macro{
  17                                 Short: "PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF3),",
  18                                 Long:  "_PAD_CFG_STRUCT(GPP_A1, PAD_FUNC(NF3) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(UP_20K) | PAD_CFG_OWN_GPIO(DRIVER)),",
  19                         },
  20                 },
  21                 { /* GPP_A12 - LFRAME# */
  22                         Pad: test.Pad{ID: "GPP_A12", DW0: 0x80880102, DW1: 0x00000000, Ownership: 0},
  23                         Macro: test.Macro{
  24                                 Short: "PAD_CFG_GPI_SCI(GPP_A12, NONE, PLTRST, LEVEL, INVERT),",
  25                                 Long:  "_PAD_CFG_STRUCT(GPP_A12, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
  26                         },
  27                 },
  28                 { /* GPP_A16 - GPIO */
  29                         Pad: test.Pad{ID: "GPP_A16", DW0: 0x44000201, DW1: 0x00000000, Ownership: 1},
  30                         Macro: test.Macro{
  31                                 Short: "PAD_CFG_GPO_GPIO_DRIVER(GPP_A16, 1, DEEP, NONE),",
  32                                 Long:  "_PAD_CFG_STRUCT(GPP_A16, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, PAD_CFG_OWN_GPIO(DRIVER)),",
  33                         },
  34                 },
  35                 { /* GPP_A20 - GPIO */
  36                         Pad: test.Pad{ID: "GPP_A20", DW0: 0x04000100, DW1: 0x00000000, Ownership: 0},
  37                         Macro: test.Macro{
  38                                 Short: "PAD_CFG_GPI_TRIG_OWN(GPP_A20, NONE, RSMRST, OFF, ACPI),",
  39                                 Long:  "_PAD_CFG_STRUCT(GPP_A20, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),",
  40                         },
  41                 },
  42                 { /* GPP_B10 - GPIO */
  43                         Pad: test.Pad{ID: "GPP_B10", DW0: 0x04000102, DW1: 0x00000000, Ownership: 0},
  44                         Macro: test.Macro{
  45                                 Short: "PAD_CFG_GPI_TRIG_OWN(GPP_B10, NONE, RSMRST, OFF, ACPI),",
  46                                 Long:  "_PAD_CFG_STRUCT(GPP_B10, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
  47                         },
  48                 },
  49                 { /* GPP_B20 - GPIO */
  50                         Pad: test.Pad{ID: "GPP_B20", DW0: 0x04000200, DW1: 0x00000000, Ownership: 0},
  51                         Macro: test.Macro{
  52                                 Short: "PAD_CFG_GPO(GPP_B20, 0, RSMRST),",
  53                                 Long:  "_PAD_CFG_STRUCT(GPP_B20, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
  54                         },
  55                 },
  56                 { /* GPP_B23 - PCHHOT# */
  57                         Pad: test.Pad{ID: "GPP_B23", DW0: 0x04000a00, DW1: 0x00000000, Ownership: 0},
  58                         Macro: test.Macro{
  59                                 Short: "PAD_CFG_NF(GPP_B23, NONE, RSMRST, NF2),",
  60                                 Long:  "_PAD_CFG_STRUCT(GPP_B23, PAD_FUNC(NF2) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
  61                         },
  62                 },
  63                 { /* GPP_F0 - SATAXPCIE3 */
  64                         Pad: test.Pad{ID: "GPP_F0", DW0: 0x04000502, DW1: 0x00000000, Ownership: 0},
  65                         Macro: test.Macro{
  66                                 Short: "PAD_CFG_NF(GPP_F0, NONE, RSMRST, NF1),",
  67                                 Long:  "_PAD_CFG_STRUCT(GPP_F0, PAD_FUNC(NF1) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
  68                         },
  69                 },
  70                 { /* GPP_C10 - GPIO */
  71                         Pad: test.Pad{ID: "GPP_C10", DW0: 0x04000000, DW1: 0x00000000, Ownership: 0},
  72                         Macro: test.Macro{
  73                                 Short: "PAD_CFG_GPIO_BIDIRECT(GPP_C10, 0, NONE, RSMRST, OFF, ACPI),",
  74                                 Long:  "_PAD_CFG_STRUCT(GPP_C10, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(OFF), 0),",
  75                         },
  76                 },
  77                 { /* GPP_C23 - GPIO */
  78                         Pad: test.Pad{ID: "GPP_C23", DW0: 0x40880102, DW1: 0x00000000, Ownership: 0},
  79                         Macro: test.Macro{
  80                                 Short: "PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, LEVEL, INVERT),",
  81                                 Long:  "_PAD_CFG_STRUCT(GPP_C23, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
  82                         },
  83                 },
  84                 { /* GPP_D1 - GPIO */
  85                         Pad: test.Pad{ID: "GPP_D1", DW0: 0x04000200, DW1: 0x00000000, Ownership: 0},
  86                         Macro: test.Macro{
  87                                 Short: "PAD_CFG_GPO(GPP_D1, 0, RSMRST),",
  88                                 Long:  "_PAD_CFG_STRUCT(GPP_D1, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
  89                         },
  90                 },
  91                 { /* GPP_D16 - GPIO */
  92                         Pad: test.Pad{ID: "GPP_D16", DW0: 0x84000100, DW1: 0x00000000, Ownership: 0},
  93                         Macro: test.Macro{
  94                                 Short: "PAD_CFG_GPI_TRIG_OWN(GPP_D16, NONE, PLTRST, OFF, ACPI),",
  95                                 Long:  "_PAD_CFG_STRUCT(GPP_D16, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),",
  96                         },
  97                 },
  98                 { /* GPP_E0 - SATAXPCIE0 */
  99                         Pad: test.Pad{ID: "GPP_E0", DW0: 0x04000502, DW1: 0x00000000, Ownership: 0},
 100                         Macro: test.Macro{
 101                                 Short: "PAD_CFG_NF(GPP_E0, NONE, RSMRST, NF1),",
 102                                 Long:  "_PAD_CFG_STRUCT(GPP_E0, PAD_FUNC(NF1) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
 103                         },
 104                 },
 105                 { /* GPP_E7 - GPIO */
 106                         Pad: test.Pad{ID: "GPP_E7", DW0: 0x40840102, DW1: 0x00000000, Ownership: 1},
 107                         Macro: test.Macro{
 108                                 Short: "PAD_CFG_GPI_SMI(GPP_E7, NONE, DEEP, LEVEL, INVERT),",
 109                                 Long:  "_PAD_CFG_STRUCT(GPP_E7, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_CFG_OWN_GPIO(DRIVER)),",
 110                         },
 111                 },
 112                 { /* GPP_F2 - GPIO */
 113                         Pad: test.Pad{ID: "GPP_F2", DW0: 0x44000300, DW1: 0x00000000, Ownership: 0},
 114                         Macro: test.Macro{
 115                                 Short: "PAD_NC(GPP_F2, NONE),",
 116                                 Long:  "_PAD_CFG_STRUCT(GPP_F2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),",
 117                         },
 118                 },
 119                 { /* GPP_F12 - GPIO */
 120                         Pad: test.Pad{ID: "GPP_F12", DW0: 0x80900102, DW1: 0x00000000, Ownership: 0},
 121                         Macro: test.Macro{
 122                                 Short: "PAD_CFG_GPI_APIC_LOW(GPP_F12, NONE, PLTRST),",
 123                                 Long:  "_PAD_CFG_STRUCT(GPP_F12, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
 124                         },
 125                 },
 126                 { /* GPP_F13 - GPIO */
 127                         Pad: test.Pad{ID: "GPP_F13", DW0: 0x80100102, DW1: 0x00000000, Ownership: 0},
 128                         Macro: test.Macro{
 129                                 Short: "PAD_CFG_GPI_APIC_HIGH(GPP_F13, NONE, PLTRST),",
 130                                 Long:  "_PAD_CFG_STRUCT(GPP_F13, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
 131                         },
 132                 },
 133                 { /* GPP_H10 - NC */
 134                         Pad: test.Pad{ID: "GPP_H10", DW0: 0x44000300, DW1: 0x00000000, Ownership: 0},
 135                         Macro: test.Macro{
 136                                 Short: "PAD_NC(GPP_H10, NONE),",
 137                                 Long:  "_PAD_CFG_STRUCT(GPP_H10, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),",
 138                         },
 139                 },
 140                 { /* GPP_L1 - CSME_INTR_OUT */
 141                         Pad: test.Pad{ID: "GPP_L1", DW0: 0x44000700, DW1: 0x00000000, Ownership: 0},
 142                         Macro: test.Macro{
 143                                 Short: "PAD_CFG_NF(GPP_L1, NONE, DEEP, NF1),",
 144                                 Long:  "_PAD_CFG_STRUCT(GPP_L1, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),",
 145                         },
 146                 },
 147                 { /* GPP_L19 - TESTCH1_CLK */
 148                         Pad: test.Pad{ID: "GPP_L19", DW0: 0x04000600, DW1: 0x00000000, Ownership: 0},
 149                         Macro: test.Macro{
 150                                 Short: "PAD_CFG_NF(GPP_L19, NONE, RSMRST, NF1),",
 151                                 Long:  "_PAD_CFG_STRUCT(GPP_L19, PAD_FUNC(NF1) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
 152                         },
 153                 },
 154         }.Run(t, "INTEL-LEWISBURG-PCH/PAD-MAP", lewisburg)
 155
 156         test.Suite{
 157                 {
 158                         Pad: test.Pad{ID: "GPP_Axx", DW0: 0xBFFFFFFF, DW1: 0xFFFFFFFF, Ownership: 1},
 159                         Macro: test.Macro{
 160                                 Short: "PAD_CFG_NF_1V8(GPP_Axx, NATIVE, PLTRST, NF7),",
 161                                 Long:  "_PAD_CFG_STRUCT(GPP_Axx, PAD_FUNC(NF7) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(NATIVE) | PAD_IOSSTATE(IGNORE) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
 162                         },
 163                 },
 164         }.Run(t, "INTEL-LEWISBURG-PCH/MASK", lewisburg)
 165
 166         test.Suite{
 167                 {
 168                         Pad: test.Pad{ID: "GPP_Bxx", DW0: 0x00000000, DW1: 0x00000000, Ownership: 0},
 169                         Macro: test.Macro{
 170                                 Short: "PAD_CFG_GPIO_BIDIRECT(GPP_Bxx, 0, NONE, RSMRST, LEVEL, ACPI),",
 171                                 Long:  "_PAD_CFG_STRUCT(GPP_Bxx, PAD_FUNC(GPIO) | PAD_RESET(RSMRST), 0),",
 172                         },
 173                 },
 174         }.Run(t, "INTEL-LEWISBURG-PCH/EMRTY", lewisburg)
 175 }