util/intelp2m/platforms/snr/snr_test.go

   1 package snr_test
   2
   3 import (
   4         "testing"
   5
   6         "review.coreboot.org/coreboot.git/util/intelp2m/platforms/snr"
   7         "review.coreboot.org/coreboot.git/util/intelp2m/platforms/test"
   8 )
   9
  10 func TestGenMacro(t *testing.T) {
  11         sunrise := snr.PlatformSpecific{}
  12         test.Suite{
  13                 { /* GPP_A1 - LAD0  */
  14                         Pad: test.Pad{ID: "GPP_A1", DW0: 0x84000402, DW1: 0x00003000, Ownership: 0},
  15                         Macro: test.Macro{
  16                                 Short: "PAD_CFG_NF(GPP_A1, UP_20K, PLTRST, NF1),",
  17                                 Long:  "_PAD_CFG_STRUCT(GPP_A1, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | (1 << 1), PAD_PULL(UP_20K)),",
  18                         },
  19                 },
  20                 { /* GPP_A5 - LFRAME# */
  21                         Pad: test.Pad{ID: "GPP_A5", DW0: 0x84000600, DW1: 0x00000000, Ownership: 0},
  22                         Macro: test.Macro{
  23                                 Short: "PAD_CFG_NF(GPP_A5, NONE, PLTRST, NF1),",
  24                                 Long:  "_PAD_CFG_STRUCT(GPP_A5, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
  25                         },
  26                 },
  27                 { /* GPP_A22 - GPIO */
  28                         Pad: test.Pad{ID: "GPP_A22", DW0: 0x84000102, DW1: 0x00000000, Ownership: 0},
  29                         Macro: test.Macro{
  30                                 Short: "PAD_CFG_GPI_TRIG_OWN(GPP_A22, NONE, PLTRST, OFF, ACPI),",
  31                                 Long:  "_PAD_CFG_STRUCT(GPP_A22, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
  32                         },
  33                 },
  34                 { /* GPP_B3 - GPIO */
  35                         Pad: test.Pad{ID: "GPP_B3", DW0: 0x44000201, DW1: 0x00000000, Ownership: 0},
  36                         Macro: test.Macro{
  37                                 Short: "PAD_CFG_GPO(GPP_B3, 1, DEEP),",
  38                                 Long:  "_PAD_CFG_STRUCT(GPP_B3, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0),",
  39                         },
  40                 },
  41                 { /* GPP_B5 - GPIO */
  42                         Pad: test.Pad{ID: "GPP_B5", DW0: 0x84000100, DW1: 0x00000000, Ownership: 0},
  43                         Macro: test.Macro{
  44                                 Short: "PAD_CFG_GPI_TRIG_OWN(GPP_B5, NONE, PLTRST, OFF, ACPI),",
  45                                 Long:  "_PAD_CFG_STRUCT(GPP_B5, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),",
  46                         },
  47                 },
  48                 { /* GPP_B8 - NC */
  49                         Pad: test.Pad{ID: "GPP_B8", DW0: 0x44000300, DW1: 0x00000000, Ownership: 0},
  50                         Macro: test.Macro{
  51                                 Short: "PAD_NC(GPP_B8, NONE),",
  52                                 Long:  "_PAD_CFG_STRUCT(GPP_B8, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),",
  53                         },
  54                 },
  55                 { /* GPP_C2 - GPIO */
  56                         Pad: test.Pad{ID: "GPP_C2", DW0: 0x44000201, DW1: 0x00000000, Ownership: 0},
  57                         Macro: test.Macro{
  58                                 Short: "PAD_CFG_GPO(GPP_C2, 1, DEEP),",
  59                                 Long:  "_PAD_CFG_STRUCT(GPP_C2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0),",
  60                         },
  61                 },
  62                 { /* GPP_C10 - GPIO */
  63                         Pad: test.Pad{ID: "GPP_C10", DW0: 0x04000000, DW1: 0x00000000, Ownership: 0},
  64                         Macro: test.Macro{
  65                                 Short: "PAD_CFG_GPIO_BIDIRECT(GPP_C10, 0, NONE, RSMRST, OFF, ACPI),",
  66                                 Long:  "_PAD_CFG_STRUCT(GPP_C10, PAD_FUNC(GPIO) | PAD_RESET(RSMRST) | PAD_TRIG(OFF), 0),",
  67                         },
  68                 },
  69                 { /* GPP_C22 - UART2_RTS#  */
  70                         Pad: test.Pad{ID: "GPP_C22", DW0: 0x84000600, DW1: 0x00000000, Ownership: 0},
  71                         Macro: test.Macro{
  72                                 Short: "PAD_CFG_NF(GPP_C22, NONE, PLTRST, NF1),",
  73                                 Long:  "_PAD_CFG_STRUCT(GPP_C22, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
  74                         },
  75                 },
  76                 { /* GPP_C23 - GPIO */
  77                         Pad: test.Pad{ID: "GPP_C23", DW0: 0x40880102, DW1: 0x00000000, Ownership: 0},
  78                         Macro: test.Macro{
  79                                 Short: "PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, LEVEL, INVERT),",
  80                                 Long:  "_PAD_CFG_STRUCT(GPP_C23, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
  81                         },
  82                 },
  83                 { /* GPP_D0 - GPIO */
  84                         Pad: test.Pad{ID: "GPP_D0", DW0: 0x84000200, DW1: 0x00000000, Ownership: 0},
  85                         Macro: test.Macro{
  86                                 Short: "PAD_CFG_GPO(GPP_D0, 0, PLTRST),",
  87                                 Long:  "_PAD_CFG_STRUCT(GPP_D0, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
  88                         },
  89                 },
  90                 { /* GPP_D16 - GPIO */
  91                         Pad: test.Pad{ID: "GPP_D16", DW0: 0x84000100, DW1: 0x00000000, Ownership: 0},
  92                         Macro: test.Macro{
  93                                 Short: "PAD_CFG_GPI_TRIG_OWN(GPP_D16, NONE, PLTRST, OFF, ACPI),",
  94                                 Long:  "_PAD_CFG_STRUCT(GPP_D16, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), 0),",
  95                         },
  96                 },
  97                 { /* GPP_E0 - SATAXPCIE0 */
  98                         Pad: test.Pad{ID: "GPP_E0", DW0: 0x84000502, DW1: 0x00003000, Ownership: 0},
  99                         Macro: test.Macro{
 100                                 Short: "PAD_CFG_NF(GPP_E0, UP_20K, PLTRST, NF1),",
 101                                 Long:  "_PAD_CFG_STRUCT(GPP_E0, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_PULL(UP_20K)),",
 102                         },
 103                 },
 104                 { /* GPP_E7 - GPIO */
 105                         Pad: test.Pad{ID: "GPP_E7", DW0: 0x84000102, DW1: 0x00000000, Ownership: 1},
 106                         Macro: test.Macro{
 107                                 Short: "PAD_CFG_GPI_TRIG_OWN(GPP_E7, NONE, PLTRST, OFF, DRIVER),",
 108                                 Long:  "_PAD_CFG_STRUCT(GPP_E7, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_CFG_OWN_GPIO(DRIVER)),",
 109                         },
 110                 },
 111                 { /* GPP_F2 - GPIO */
 112                         Pad: test.Pad{ID: "GPP_F2", DW0: 0x44000300, DW1: 0x00000000, Ownership: 0},
 113                         Macro: test.Macro{
 114                                 Short: "PAD_NC(GPP_F2, NONE),",
 115                                 Long:  "_PAD_CFG_STRUCT(GPP_F2, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0),",
 116                         },
 117                 },
 118                 { /* GPP_F12 - GPIO */
 119                         Pad: test.Pad{ID: "GPP_F12", DW0: 0x80900102, DW1: 0x00000000, Ownership: 0},
 120                         Macro: test.Macro{
 121                                 Short: "PAD_CFG_GPI_APIC_LOW(GPP_F12, NONE, PLTRST),",
 122                                 Long:  "_PAD_CFG_STRUCT(GPP_F12, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
 123                         },
 124                 },
 125                 { /* GPP_F13 - GPIO */
 126                         Pad: test.Pad{ID: "GPP_F13", DW0: 0x80100102, DW1: 0x00000000, Ownership: 0},
 127                         Macro: test.Macro{
 128                                 Short: "PAD_CFG_GPI_APIC_HIGH(GPP_F13, NONE, PLTRST),",
 129                                 Long:  "_PAD_CFG_STRUCT(GPP_F13, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
 130                         },
 131                 },
 132                 { /* GPP_F14 - GPIO */
 133                         Pad: test.Pad{ID: "GPP_F14", DW0: 0x40900102, DW1: 0x00000000, Ownership: 0},
 134                         Macro: test.Macro{
 135                                 Short: "PAD_CFG_GPI_APIC_LOW(GPP_F14, NONE, DEEP),",
 136                                 Long:  "_PAD_CFG_STRUCT(GPP_F14, PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_IRQ_ROUTE(IOAPIC) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
 137                         },
 138                 },
 139                 { /* GPP_H13 - GPIO */
 140                         Pad: test.Pad{ID: "GPP_H13", DW0: 0x80100102, DW1: 0x00000000, Ownership: 0},
 141                         Macro: test.Macro{
 142                                 Short: "PAD_CFG_GPI_APIC_HIGH(GPP_H13, NONE, PLTRST),",
 143                                 Long:  "_PAD_CFG_STRUCT(GPP_H13, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
 144                         },
 145                 },
 146                 { /* GPD1 - GPIO */
 147                         Pad: test.Pad{ID: "GPD1", DW0: 0x04000200, DW1: 0x00000000, Ownership: 0},
 148                         Macro: test.Macro{
 149                                 Short: "PAD_CFG_GPO(GPD1, 0, PWROK),",
 150                                 Long:  "_PAD_CFG_STRUCT(GPD1, PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE), 0),",
 151                         },
 152                 },
 153                 { /* GPD2 - LAN_WAKE# */
 154                         Pad: test.Pad{ID: "GPD2", DW0: 0x00080602, DW1: 0x00003c00, Ownership: 0},
 155                         Macro: test.Macro{
 156                                 Short: "PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1),",
 157                                 Long:  "_PAD_CFG_STRUCT(GPD2, PAD_FUNC(NF1) | PAD_IRQ_ROUTE(SCI) | PAD_BUF(RX_DISABLE) | (1 << 1), PAD_PULL(NATIVE)),",
 158                         },
 159                 },
 160                 { /* GPD3 - PWRBTN# */
 161                         Pad: test.Pad{ID: "GPD3", DW0: 0x04000502, DW1: 0x00003000, Ownership: 0},
 162                         Macro: test.Macro{
 163                                 Short: "PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),",
 164                                 Long:  "_PAD_CFG_STRUCT(GPD3, PAD_FUNC(NF1) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), PAD_PULL(UP_20K)),",
 165                         },
 166                 },
 167                 { /* GPD7 - GPIO */
 168                         Pad: test.Pad{ID: "GPD7", DW0: 0x84000103, DW1: 0x00000000, Ownership: 0},
 169                         Macro: test.Macro{
 170                                 Short: "PAD_CFG_GPI_TRIG_OWN(GPD7, NONE, PLTRST, OFF, ACPI),",
 171                                 Long:  "_PAD_CFG_STRUCT(GPD7, PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1) | 1, 0),",
 172                         },
 173                 },
 174                 { /* GPP_I1 - DDPC_HPD1 */
 175                         Pad: test.Pad{ID: "GPP_I1", DW0: 0x84000502, DW1: 0x00000000, Ownership: 0},
 176                         Macro: test.Macro{
 177                                 Short: "PAD_CFG_NF(GPP_I1, NONE, PLTRST, NF1),",
 178                                 Long:  "_PAD_CFG_STRUCT(GPP_I1, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE) | (1 << 1), 0),",
 179                         },
 180                 },
 181                 { /* GPP_I8 - DDPC_CTRLDATA */
 182                         Pad: test.Pad{ID: "GPP_I8", DW0: 0x84000500, DW1: 0x00001000, Ownership: 0},
 183                         Macro: test.Macro{
 184                                 Short: "PAD_CFG_NF(GPP_I8, DN_20K, PLTRST, NF1),",
 185                                 Long:  "_PAD_CFG_STRUCT(GPP_I8, PAD_FUNC(NF1) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(TX_DISABLE), PAD_PULL(DN_20K)),",
 186                         },
 187                 },
 188         }.Run(t, "INTEL-SUNRISE-PCH/PAD-MAP", sunrise)
 189
 190         test.Suite{
 191                 {
 192                         Pad: test.Pad{ID: "GPP_Axx", DW0: 0xBFFFFFFF, DW1: 0xFFFFFFFF, Ownership: 1},
 193                         Macro: test.Macro{
 194                                 Short: "PAD_CFG_NF_1V8(GPP_Axx, NATIVE, PLTRST, NF7),",
 195                                 Long:  "_PAD_CFG_STRUCT(GPP_Axx, PAD_FUNC(NF7) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(NATIVE) | PAD_IOSSTATE(IGNORE) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
 196                         },
 197                 },
 198         }.Run(t, "INTEL-SUNRISE-PCH/MASK", sunrise)
 199
 200         test.Suite{
 201                 {
 202                         Pad: test.Pad{ID: "GPP_Bxx", DW0: 0x00000000, DW1: 0x00000000, Ownership: 0},
 203                         Macro: test.Macro{
 204                                 Short: "PAD_CFG_GPIO_BIDIRECT(GPP_Bxx, 0, NONE, RSMRST, LEVEL, ACPI),",
 205                                 Long:  "_PAD_CFG_STRUCT(GPP_Bxx, PAD_FUNC(GPIO) | PAD_RESET(RSMRST), 0),",
 206                         },
 207                 },
 208         }.Run(t, "INTEL-SUNRISE-PCH/EMRTY", sunrise)
 209 }