1 ## SPDX
-License
-Identifier
: GPL
-2.0-or-later
3 chip northbridge
/intel
/haswell
4 register
"ec_present" = "true"
5 register
"spd_addresses" = "{0x50, 0, 0x52, 0}"
8 device cpu_cluster
0 on ops haswell_cpu_bus_ops
end
12 ops haswell_pci_domain_ops
13 subsystemid
0x1028 0x05ca inherit
15 device pci
00.0 on
end # Host bridge
16 device pci
02.0 on # Internal graphics VGA controller
17 register
"gfx" = "GMA_STATIC_DISPLAYS(0)"
18 register
"gpu_ddi_e_connected" = "0"
19 register
"gpu_dp_b_hotplug" = "4"
20 register
"gpu_dp_c_hotplug" = "4"
21 register
"gpu_dp_d_hotplug" = "4"
22 register
"panel_cfg" = "{
25 .cycle_delay_ms = 500,
26 .backlight_on_delay_ms = 1,
27 .backlight_off_delay_ms = 1,
28 .backlight_pwm_hz = 200,
31 device pci
03.0 on
end # Mini
-HD audio
33 chip southbridge
/intel
/lynxpoint # Intel Series
8 Lynx Point PCH
34 register
"docking_supported" = "1"
35 register
"alt_gp_smi_en" = "0x00002000"
36 register
"gpe0_en_1" = "0x00000100"
37 register
"gpe0_en_2" = "0x00000080"
38 register
"gpe0_en_4" = "0x00000042"
40 device pci
13.0 off
end # Smart Sound Audio DSP
41 device pci
14.0 on
end # xHCI Controller
42 device pci
15.0 off
end # Serial I
/O DMA
43 device pci
15.1 off
end # I2C0
44 device pci
15.2 off
end # I2C1
45 device pci
15.3 off
end # GSPI0
46 device pci
15.4 off
end # GSPI1
47 device pci
15.5 off
end # UART0
48 device pci
15.6 off
end # UART1
49 device pci
16.0 on
end # Management Engine Interface
1
50 device pci
16.1 off
end # Management Engine Interface
2
51 device pci
16.2 off
end # Management Engine IDE
-R
52 device pci
16.3 off
end # Management Engine KT
53 device pci
17.0 off
end # SDIO
54 device pci
19.0 on
end # Intel Gigabit Ethernet
55 device pci
1b
.0 on
end # High Definition Audio
56 device pci
1c
.0 on
end # PCIe Port #
1
57 device pci
1c
.1 off
end # PCIe Port #
2
58 device pci
1c
.2 off
end # PCIe Port #
3
59 device pci
1c
.3 on
end # PCIe Port #
4, WLAN
60 device pci
1c
.4 on
end # PCIe Port #
5, SD
/MMC Card Reader
61 # PCIe Port #
6 Can be muxed between PCIe
and SATA
62 device pci
1c
.5 on
end # PCIe Port #
6
63 device pci
1d
.0 on
end # USB2 EHCI #
1
64 device pci
1f
.0 on # LPC bridge
65 register
"gen1_dec" = "0x007c0681"
66 register
"gen2_dec" = "0x005c0921"
67 register
"gen3_dec" = "0x003c07e1"
68 # Enable
0x910 and 0x911 for early init
and EC driver
69 register
"gen4_dec" = "0x007c0901"
72 device pnp ff
.0 on
end
75 device pci
1f
.2 on # SATA Controller
(AHCI
)
76 #
0(eSATA on dock
), 1(mSATA near the fan
), 3(mSATA near WLAN
)
77 register
"sata_port_map" = "0x0b"
79 device pci
1f
.3 on
end # SMBus
80 device pci
1f
.6 off
end # Thermal