mb/starlabs/{lite_adl,byte_adl}: Don't select MAINBOARD_HAS_TPM2
[coreboot2.git] / src / soc / intel / apollolake / pnpconfig.c
blobebc1880778c5e0fbc54ec605bd5b4162c24d6e18
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <bootstate.h>
4 #include <console/console.h>
5 #include <intelblocks/pcr.h>
6 #include <soc/pci_devs.h>
7 #include <soc/pnpconfig.h>
8 #include "chip.h"
10 static const struct pnpconfig perf[] = {
11 VALUEFORPERF_MSG_VALUES_PLATFORM_DEFAULT,
14 static const struct pnpconfig power[] = {
15 VALUEFORPOWER_MSG_VALUES_PLATFORM_DEFAULT,
18 static const struct pnpconfig power_perf[] = {
19 VALUEFORPWRPERF_MSG_VALUES_PLATFORM_DEFAULT,
22 static void pnp_settings(void *unused)
24 int index;
25 size_t arrsize;
26 const struct pnpconfig *pnpconfigarr;
27 struct soc_intel_apollolake_config *config;
29 config = config_of_soc();
31 switch (config->pnp_settings) {
32 case PNP_PERF:
33 pnpconfigarr = perf;
34 arrsize = ARRAY_SIZE(perf);
35 break;
36 case PNP_POWER:
37 pnpconfigarr = power;
38 arrsize = ARRAY_SIZE(power);
39 break;
40 case PNP_PERF_POWER:
41 pnpconfigarr = power_perf;
42 arrsize = ARRAY_SIZE(power_perf);
43 break;
44 default:
45 printk(BIOS_NOTICE, "Invalid PNP settings selected");
46 return;
49 for (index = 0; index < arrsize; index++)
50 pcr_rmw32(pnpconfigarr[index].msgport,
51 pnpconfigarr[index].msgregaddr,
52 pnpconfigarr[index].mask,
53 pnpconfigarr[index].value);
56 BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, pnp_settings, NULL);