mb/starlabs/{lite_adl,byte_adl}: Don't select MAINBOARD_HAS_TPM2
[coreboot2.git] / src / soc / intel / braswell / iosf.c
blob11c44d038736a5220b9dd9712e8e6c019c8eab7c
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <stdint.h>
4 #include <device/pci_ops.h>
5 #include <console/console.h>
6 #include <soc/iosf.h>
8 static inline void write_iosf_reg(int reg, uint32_t value)
10 pci_s_write_config32(IOSF_PCI_DEV, reg, value);
13 static inline uint32_t read_iosf_reg(int reg)
15 return pci_s_read_config32(IOSF_PCI_DEV, reg);
18 /* Common sequences for all the port accesses. */
19 static uint32_t iosf_read_port(uint32_t cr, int reg)
21 cr |= IOSF_REG(reg) | IOSF_BYTE_EN;
22 write_iosf_reg(MCRX_REG, IOSF_REG_UPPER(reg));
23 write_iosf_reg(MCR_REG, cr);
24 return read_iosf_reg(MDR_REG);
27 static void iosf_write_port(uint32_t cr, int reg, uint32_t val)
29 cr |= IOSF_REG(reg) | IOSF_BYTE_EN;
30 write_iosf_reg(MDR_REG, val);
31 write_iosf_reg(MCRX_REG, IOSF_REG_UPPER(reg));
32 write_iosf_reg(MCR_REG, cr);
35 #define IOSF_READ(port) \
36 (IOSF_OPCODE(IOSF_OP_READ_##port) | IOSF_PORT(IOSF_PORT_##port))
37 #define IOSF_WRITE(port) \
38 (IOSF_OPCODE(IOSF_OP_WRITE_##port) | IOSF_PORT(IOSF_PORT_##port))
40 uint32_t iosf_bunit_read(int reg)
42 return iosf_read_port(IOSF_READ(BUNIT), reg);
45 void iosf_bunit_write(int reg, uint32_t val)
47 iosf_write_port(IOSF_WRITE(BUNIT), reg, val);
50 uint32_t iosf_punit_read(int reg)
52 return iosf_read_port(IOSF_READ(PMC), reg);
55 void iosf_punit_write(int reg, uint32_t val)
57 iosf_write_port(IOSF_WRITE(PMC), reg, val);
60 uint32_t iosf_score_read(int reg)
62 return iosf_read_port(IOSF_READ(SCORE), reg);
65 void iosf_score_write(int reg, uint32_t val)
67 iosf_write_port(IOSF_WRITE(SCORE), reg, val);
70 uint32_t iosf_lpss_read(int reg)
72 return iosf_read_port(IOSF_READ(LPSS), reg);
75 void iosf_lpss_write(int reg, uint32_t val)
77 iosf_write_port(IOSF_WRITE(LPSS), reg, val);
80 uint32_t iosf_port58_read(int reg)
82 return iosf_read_port(IOSF_READ(0x58), reg);
85 void iosf_port58_write(int reg, uint32_t val)
87 iosf_write_port(IOSF_WRITE(0x58), reg, val);
90 uint32_t iosf_scc_read(int reg)
92 return iosf_read_port(IOSF_READ(SCC), reg);
95 void iosf_scc_write(int reg, uint32_t val)
97 iosf_write_port(IOSF_WRITE(SCC), reg, val);
100 uint32_t iosf_usbphy_read(int reg)
102 return iosf_read_port(IOSF_READ(USBPHY), reg);
105 void iosf_usbphy_write(int reg, uint32_t val)
107 iosf_write_port(IOSF_WRITE(USBPHY), reg, val);
110 #if ENV_RAMSTAGE
111 uint64_t reg_script_read_iosf(struct reg_script_context *ctx)
113 const struct reg_script *step = ctx->step;
115 /* Process the request */
116 switch (step->id) {
117 case IOSF_PORT_BUNIT:
118 return iosf_bunit_read(step->reg);
119 case IOSF_PORT_SCORE:
120 return iosf_score_read(step->reg);
121 case IOSF_PORT_LPSS:
122 return iosf_lpss_read(step->reg);
123 case IOSF_PORT_0x58:
124 return iosf_port58_read(step->reg);
125 case IOSF_PORT_SCC:
126 return iosf_scc_read(step->reg);
127 case IOSF_PORT_USBPHY:
128 return iosf_usbphy_read(step->reg);
129 default:
130 printk(BIOS_DEBUG, "No read support for IOSF port 0x%x.\n",
131 step->id);
132 break;
134 return 0;
137 void reg_script_write_iosf(struct reg_script_context *ctx)
139 const struct reg_script *step = ctx->step;
141 /* Process the request */
142 switch (step->id) {
143 case IOSF_PORT_BUNIT:
144 iosf_bunit_write(step->reg, step->value);
145 break;
146 case IOSF_PORT_SCORE:
147 iosf_score_write(step->reg, step->value);
148 break;
149 case IOSF_PORT_LPSS:
150 iosf_lpss_write(step->reg, step->value);
151 break;
152 case IOSF_PORT_0x58:
153 iosf_port58_write(step->reg, step->value);
154 break;
155 case IOSF_PORT_SCC:
156 iosf_scc_write(step->reg, step->value);
157 break;
158 case IOSF_PORT_USBPHY:
159 iosf_usbphy_write(step->reg, step->value);
160 break;
161 default:
162 printk(BIOS_DEBUG, "No write support for IOSF port 0x%x.\n",
163 step->id);
164 break;
168 static const struct reg_script_bus_entry reg_script_bus_table = {
169 REG_SCRIPT_TYPE_IOSF, reg_script_read_iosf, reg_script_write_iosf
172 REG_SCRIPT_BUS_ENTRY(reg_script_bus_table);
174 #endif /* ENV_RAMSTAGE */