src/soc/intel/xeon_sp/cpx/soc_util.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <assert.h>
   4 #include <device/device.h>
   5 #include <device/pci.h>
   6 #include <intelblocks/cpulib.h>
   7 #include <soc/pci_devs.h>
   8 #include <soc/soc_util.h>
   9 #include <soc/util.h>
  10 #include <pc80/mc146818rtc.h>
  11
  12 const struct SystemMemoryMapHob *get_system_memory_map(void)
  13 {
  14         size_t hob_size;
  15         const uint8_t mem_hob_guid[16] = FSP_SYSTEM_MEMORYMAP_HOB_GUID;
  16         const struct SystemMemoryMapHob **memmap_addr;
  17
  18         memmap_addr = (const struct SystemMemoryMapHob **)
  19                 fsp_find_extension_hob_by_guid(mem_hob_guid, &hob_size);
  20         /* hob_size is the size of the 8-byte address not the hob data */
  21         assert(memmap_addr && hob_size != 0);
  22         /* assert the pointer to the hob is not NULL */
  23         assert(*memmap_addr);
  24
  25         return *memmap_addr;
  26 }
  27
  28 bool is_pcie_iio_stack_res(const STACK_RES *res)
  29 {
  30         return res->Personality == TYPE_UBOX_IIO;
  31 }
  32
  33 bool is_ubox_stack_res(const STACK_RES *res)
  34 {
  35         return res->Personality == TYPE_UBOX;
  36 }
  37
  38 /* Returns the UBOX(stack) bus number when called from socket0 */
  39 uint8_t socket0_get_ubox_busno(const uint8_t stack)
  40 {
  41         if (stack >= MAX_IIO_STACK) {
  42                 printk(BIOS_ERR, "%s: Stack %u does not exist!\n", __func__, stack);
  43                 return 0;
  44         }
  45         const pci_devfn_t dev = PCI_DEV(UBOX_DECS_BUS, UBOX_DECS_DEV, UBOX_DECS_FUNC);
  46         const uint16_t offset = stack / 4 ? UBOX_DECS_CPUBUSNO1_CSR : UBOX_DECS_CPUBUSNO_CSR;
  47         return pci_io_read_config32(dev, offset) >> (8 * (stack % 4)) & 0xff;
  48 }
  49
  50 /*
  51  * EX: CPX-SP
  52  * Ports    Stack   Stack(HOB)  IioConfigIou
  53  * ==========================================
  54  * 0        CSTACK      stack 0     IOU0
  55  * 1A..1D   PSTACKZ     stack 1     IOU1
  56  * 2A..2D   PSTACK1     stack 2     IOU2
  57  * 3A..3D   PSTACK2     stack 4     IOU3
  58  */
  59 int soc_get_stack_for_port(int port)
  60 {
  61         if (port == PORT_0)
  62                 return CSTACK;
  63         else if (port >= PORT_1A && port <= PORT_1D)
  64                 return PSTACK0;
  65         else if (port >= PORT_2A && port <= PORT_2D)
  66                 return PSTACK1;
  67         else if (port >= PORT_3A && port <= PORT_3D)
  68                 return PSTACK2;
  69         else
  70                 return -1;
  71 }
  72
  73 uint8_t soc_get_iio_ioapicid(int socket, int stack)
  74 {
  75         uint8_t ioapic_id = socket ? 0xf : 0x9;
  76         switch (stack) {
  77         case CSTACK:
  78                 break;
  79         case PSTACK0:
  80                 ioapic_id += 1;
  81                 break;
  82         case PSTACK1:
  83                 ioapic_id += 2;
  84                 break;
  85         case PSTACK2:
  86                 ioapic_id += 3;
  87                 break;
  88         default:
  89                 return 0xff;
  90         }
  91         return ioapic_id;
  92 }
  93
  94 void soc_set_mrc_cold_boot_flag(bool cold_boot_required)
  95 {
  96         uint8_t mrc_status = cmos_read(CMOS_OFFSET_MRC_STATUS);
  97         uint8_t new_mrc_status = (mrc_status & 0xfe) | cold_boot_required;
  98         printk(BIOS_SPEW, "MRC status: 0x%02x want 0x%02x\n", mrc_status, new_mrc_status);
  99         if (new_mrc_status != mrc_status) {
 100                 cmos_write(new_mrc_status, CMOS_OFFSET_MRC_STATUS);
 101         }
 102 }
 103
 104 void get_iiostack_info(struct iiostack_resource *info)
 105 {
 106         const IIO_UDS *hob = get_iio_uds();
 107
 108         // copy IIO Stack info from FSP HOB
 109         info->no_of_stacks = 0;
 110         for (int socket = 0, iio = 0; iio < hob->PlatformData.numofIIO; ++socket) {
 111                 if (!soc_cpu_is_enabled(socket))
 112                         continue;
 113                 iio++;
 114                 for (int x = 0; x < MAX_IIO_STACK; ++x) {
 115                         const STACK_RES *ri;
 116                         ri = &hob->PlatformData.IIO_resource[socket].StackRes[x];
 117                         if (!is_pcie_iio_stack_res(ri))
 118                                 continue;
 119                         assert(info->no_of_stacks < (CONFIG_MAX_SOCKET * MAX_IIO_STACK));
 120                         memcpy(&info->res[info->no_of_stacks++], ri, sizeof(STACK_RES));
 121                 }
 122         }
 123 }
 124
 125 bool is_memtype_reserved(uint16_t mem_type)
 126 {
 127         return !!(mem_type & MEM_TYPE_RESERVED);
 128 }
 129
 130 bool is_memtype_non_volatile(uint16_t mem_type)
 131 {
 132         return !(mem_type & MEMTYPE_VOLATILE_MASK);
 133 }
 134
 135 bool is_memtype_processor_attached(uint16_t mem_type)
 136 {
 137         return true;
 138 }
 139
 140 uint8_t get_cxl_node_count(void)
 141 {
 142         return 0;
 143 }
 144
 145 bool get_mmio_high_base_size(resource_t *base, resource_t *size)
 146 {
 147         return false;
 148 }