1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/console.h>
7 #define DUMP_UPD(old, new, field) \
8 fsp_display_upd_value(#field, sizeof(old->field), old->field, new->field)
10 /* Display the UPD parameters for MemoryInit */
11 void soc_display_fspm_upd_params(
12 const FSPM_UPD
*fspm_old_upd
,
13 const FSPM_UPD
*fspm_new_upd
)
15 const FSP_M_CONFIG
*new;
16 const FSP_M_CONFIG
*old
;
18 old
= &fspm_old_upd
->FspmConfig
;
19 new = &fspm_new_upd
->FspmConfig
;
21 printk(BIOS_DEBUG
, "UPD values for MemoryInit:\n");
23 DUMP_UPD(old
, new, DebugPrintLevel
);
24 DUMP_UPD(old
, new, PchAdrEn
);
26 hexdump(fspm_new_upd
, sizeof(*fspm_new_upd
));
29 /* Display the UPD parameters for SiliconInit */
30 void soc_display_fsps_upd_params(
31 const FSPS_UPD
*fsps_old_upd
,
32 const FSPS_UPD
*fsps_new_upd
)
34 const FSP_S_CONFIG
*new;
35 const FSP_S_CONFIG
*old
;
37 old
= &fsps_old_upd
->FspsConfig
;
38 new = &fsps_new_upd
->FspsConfig
;
40 printk(BIOS_DEBUG
, "UPD values for SiliconInit:\n");
42 DUMP_UPD(old
, new, BifurcationPcie0
);
43 DUMP_UPD(old
, new, BifurcationPcie1
);
44 DUMP_UPD(old
, new, ActiveCoreCount
);
45 DUMP_UPD(old
, new, CpuMicrocodePatchBase
);
46 DUMP_UPD(old
, new, CpuMicrocodePatchSize
);
47 DUMP_UPD(old
, new, EnablePcie0
);
48 DUMP_UPD(old
, new, EnablePcie1
);
49 DUMP_UPD(old
, new, EnableEmmc
);
50 DUMP_UPD(old
, new, EnableGbE
);
51 DUMP_UPD(old
, new, FiaMuxConfigRequestPtr
);
52 DUMP_UPD(old
, new, PcieRootPort0DeEmphasis
);
53 DUMP_UPD(old
, new, PcieRootPort1DeEmphasis
);
54 DUMP_UPD(old
, new, PcieRootPort2DeEmphasis
);
55 DUMP_UPD(old
, new, PcieRootPort3DeEmphasis
);
56 DUMP_UPD(old
, new, PcieRootPort4DeEmphasis
);
57 DUMP_UPD(old
, new, PcieRootPort5DeEmphasis
);
58 DUMP_UPD(old
, new, PcieRootPort6DeEmphasis
);
59 DUMP_UPD(old
, new, PcieRootPort7DeEmphasis
);
60 DUMP_UPD(old
, new, EMMCDLLConfigPtr
);
62 hexdump(fsps_new_upd
, sizeof(*fsps_new_upd
));