src/soc/intel/xeon_sp/gnr/Makefile.mk

   1 ## SPDX-License-Identifier: GPL-2.0-only
   2
   3 ifeq ($(CONFIG_SOC_INTEL_GRANITERAPIDS),y)
   4
   5 subdirs-y += ../../../../cpu/intel/turbo
   6 subdirs-y += ../../../../cpu/x86/lapic
   7 subdirs-y += ../../../../cpu/x86/mtrr
   8 subdirs-y += ../../../../cpu/x86/smm
   9 subdirs-y += ../../../../cpu/x86/tsc
  10 subdirs-y += ../../../../cpu/intel/microcode
  11
  12 romstage-y += romstage.c
  13 romstage-y += soc_util.c
  14 romstage-y += soc_iio.c
  15 romstage-y += ../dimm.c
  16 romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
  17
  18 ramstage-y += chip.c
  19 ramstage-y += cpu.c
  20 ramstage-y += soc_util.c
  21 ramstage-y += ramstage.c
  22 ramstage-y += soc_acpi.c
  23 ramstage-y += ../chip_gen6.c
  24
  25 CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/gnr/include
  26 CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/gnr
  27
  28 CFLAGS_common += -fshort-wchar
  29
  30 endif ## CONFIG_SOC_INTEL_GRANITERAPIDS